Commit ff37a41d authored by Oliver Upton's avatar Oliver Upton Committed by Marc Zyngier
Browse files

KVM: arm64: nv: Treat AMO as 1 when at EL2 and {E2H,TGE} = {1, 0} 



SErrors are not deliverable at EL2 when the effective value of
HCR_EL2.{TGE,AMO} = {0, 0}. This is bothersome to deal with in nested
as we need to use auxiliary pending state to track the pending vSError
since HCR_EL2.VSE has no mechanism for honoring the guest HCR. On top of
that, we have no way of making that auxiliary pending state visible in
ISR_EL1.

A defect against the architecture now allows an implementation to treat
HCR_EL2.AMO as 1 when HCR_EL2.{E2H,TGE} = {1, 0}. Let's do exactly that,
meaning SErrors are always deliverable at EL2 for the typical E2H=RES1
VM.

Signed-off-by: default avatarOliver Upton <oliver.upton@linux.dev>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parent b320789d

arch/arm64/include/asm/kvm_emulate.h

+14 −0
Original line number Diff line number Diff line
@@ -220,6 +220,20 @@ static inline bool vcpu_el2_tge_is_set(const struct kvm_vcpu *vcpu) 


static inline bool vcpu_el2_amo_is_set(const struct kvm_vcpu *vcpu)

{

	/*

	 * DDI0487L.b Known Issue D22105

	 *

	 * When executing at EL2 and HCR_EL2.{E2H,TGE} = {1, 0} it is

	 * IMPLEMENTATION DEFINED whether the effective value of HCR_EL2.AMO

	 * is the value programmed or 1.

	 *

	 * Make the implementation choice of treating the effective value as 1 as

	 * we cannot subsequently catch changes to TGE or AMO that would

	 * otherwise lead to the SError becoming deliverable.

	 */

	if (vcpu_is_el2(vcpu) && vcpu_el2_e2h_is_set(vcpu) && !vcpu_el2_tge_is_set(vcpu))

		return true;



	return ctxt_sys_reg(&vcpu->arch.ctxt, HCR_EL2) & HCR_AMO;

}