Commit ff9e786f authored by Marian-Cristian Rotariu's avatar Marian-Cristian Rotariu Committed by Geert Uytterhoeven
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arm64: dts: renesas: r8a774e1: Add FDP1 device nodes 



Add FDP1 device nodes to R8A774E1 (RZ/G2H) SoC dtsi.

Signed-off-by: default avatarMarian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20200827145315.26261-2-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent a0be3c32

arch/arm64/boot/dts/renesas/r8a774e1.dtsi

+20 −0
Original line number Diff line number Diff line
@@ -2504,6 +2504,26 @@ vspi1: vsp@fe9b0000 { 
			renesas,fcp = <&fcpvi1>;

		};



		fdp1@fe940000 {

			compatible = "renesas,fdp1";

			reg = <0 0xfe940000 0 0x2400>;

			interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 119>;

			power-domains = <&sysc R8A774E1_PD_A3VP>;

			resets = <&cpg 119>;

			renesas,fcp = <&fcpf0>;

		};



		fdp1@fe944000 {

			compatible = "renesas,fdp1";

			reg = <0 0xfe944000 0 0x2400>;

			interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 118>;

			power-domains = <&sysc R8A774E1_PD_A3VP>;

			resets = <&cpg 118>;

			renesas,fcp = <&fcpf1>;

		};



		fcpf0: fcp@fe950000 {

			compatible = "renesas,fcpf";

			reg = <0 0xfe950000 0 0x200>;