Unverified Commit ffef54ad authored by Nick Hu's avatar Nick Hu Committed by Alexandre Ghiti
Browse files

riscv: Add stimecmp save and restore 



If the HW support the SSTC extension, we should save and restore the
stimecmp register while cpu non retention suspend.

Signed-off-by: default avatarNick Hu <nick.hu@sifive.com>
Reviewed-by: default avatarAnup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20250219114135.27764-2-nick.hu@sifive.com


Signed-off-by: default avatarAlexandre Ghiti <alexghiti@rivosinc.com>
parent 6586788f

arch/riscv/include/asm/suspend.h

+4 −0
Original line number Diff line number Diff line
@@ -18,6 +18,10 @@ struct suspend_context { 
	unsigned long ie;

#ifdef CONFIG_MMU

	unsigned long satp;

	unsigned long stimecmp;

#if __riscv_xlen < 64

	unsigned long stimecmph;

#endif

#endif

};

arch/riscv/kernel/suspend.c

+14 −0
Original line number Diff line number Diff line
@@ -30,6 +30,13 @@ void suspend_save_csrs(struct suspend_context *context) 
	 */



#ifdef CONFIG_MMU

	if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SSTC)) {

		context->stimecmp = csr_read(CSR_STIMECMP);

#if __riscv_xlen < 64

		context->stimecmph = csr_read(CSR_STIMECMPH);

#endif

	}



	context->satp = csr_read(CSR_SATP);

#endif

}
@@ -43,6 +50,13 @@ void suspend_restore_csrs(struct suspend_context *context) 
	csr_write(CSR_IE, context->ie);



#ifdef CONFIG_MMU

	if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SSTC)) {

		csr_write(CSR_STIMECMP, context->stimecmp);

#if __riscv_xlen < 64

		csr_write(CSR_STIMECMPH, context->stimecmph);

#endif

	}



	csr_write(CSR_SATP, context->satp);

#endif

}