Commit fff61797 authored by Ajit Pandey's avatar Ajit Pandey Committed by Bjorn Andersson
Browse files

clk: qcom: clk-alpha-pll: Fix CAL_L_VAL override for LUCID EVO PLL 



In LUCID EVO PLL CAL_L_VAL and L_VAL bitfields are part of single
PLL_L_VAL register. Update for L_VAL bitfield values in PLL_L_VAL
register using regmap_write() API in __alpha_pll_trion_set_rate
callback will override LUCID EVO PLL initial configuration related
to PLL_CAL_L_VAL bit fields in PLL_L_VAL register.

Observed random PLL lock failures during PLL enable due to such
override in PLL calibration value. Use regmap_update_bits() with
L_VAL bitfield mask instead of regmap_write() API to update only
PLL_L_VAL bitfields in __alpha_pll_trion_set_rate callback.

Fixes: 260e3660 ("clk: qcom: clk-alpha-pll: add Lucid EVO PLL configuration interfaces")
Cc: stable@vger.kernel.org
Signed-off-by: default avatarAjit Pandey <quic_ajipan@quicinc.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: default avatarVladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Link: https://lore.kernel.org/r/20240611133752.2192401-2-quic_ajipan@quicinc.com


Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
parent b4c71885

drivers/clk/qcom/clk-alpha-pll.c

+1 −1
Original line number Diff line number Diff line
@@ -1712,7 +1712,7 @@ static int __alpha_pll_trion_set_rate(struct clk_hw *hw, unsigned long rate, 
	if (ret < 0)

		return ret;



	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);

	regmap_update_bits(pll->clkr.regmap, PLL_L_VAL(pll), LUCID_EVO_PLL_L_VAL_MASK,  l);

	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);



	/* Latch the PLL input */