mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git/
synced 2026-04-23 08:55:56 -04:00
Merge tag 'amd-drm-next-5.15-2021-07-29' of https://gitlab.freedesktop.org/agd5f/linux into drm-next
amd-drm-next-5.15-2021-07-29: amdgpu: - VCN/JPEG power down sequencing fixes - Various navi pcie link handling fixes - Clockgating fixes - Yellow Carp fixes - Beige Goby fixes - Misc code cleanups - S0ix fixes - SMU i2c bus rework - EEPROM handling rework - PSP ucode handling cleanup - SMU error handling rework - AMD HDMI freesync fixes - USB PD firmware update rework - MMIO based vram access rework - Misc display fixes - Backlight fixes - Add initial Cyan Skillfish support - Overclocking fixes suspend/resume amdkfd: - Sysfs leak fix - Add counters for vm faults and migration - GPUVM TLB optimizations radeon: - Misc fixes Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210730033455.3852-1-alexander.deucher@amd.com
This commit is contained in:
Dave Airlie
@@ -88,6 +88,46 @@ struct amdgpu_prt_cb {
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struct dma_fence_cb cb;
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};
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/**
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* amdgpu_vm_set_pasid - manage pasid and vm ptr mapping
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*
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* @adev: amdgpu_device pointer
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* @vm: amdgpu_vm pointer
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* @pasid: the pasid the VM is using on this GPU
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*
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* Set the pasid this VM is using on this GPU, can also be used to remove the
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* pasid by passing in zero.
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*
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*/
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int amdgpu_vm_set_pasid(struct amdgpu_device *adev, struct amdgpu_vm *vm,
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u32 pasid)
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{
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int r;
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if (vm->pasid == pasid)
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return 0;
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if (vm->pasid) {
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r = xa_err(xa_erase_irq(&adev->vm_manager.pasids, vm->pasid));
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if (r < 0)
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return r;
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vm->pasid = 0;
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}
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if (pasid) {
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r = xa_err(xa_store_irq(&adev->vm_manager.pasids, pasid, vm,
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GFP_KERNEL));
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if (r < 0)
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return r;
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vm->pasid = pasid;
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}
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return 0;
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}
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/*
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* vm eviction_lock can be taken in MMU notifiers. Make sure no reclaim-FS
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* happens while holding this lock anywhere to prevent deadlocks when
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@@ -2863,14 +2903,13 @@ long amdgpu_vm_wait_idle(struct amdgpu_vm *vm, long timeout)
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*
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* @adev: amdgpu_device pointer
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* @vm: requested vm
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* @pasid: Process address space identifier
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*
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* Init @vm fields.
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*
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* Returns:
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* 0 for success, error for failure.
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*/
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int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm, u32 pasid)
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int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm)
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{
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struct amdgpu_bo *root_bo;
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struct amdgpu_bo_vm *root;
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@@ -2944,19 +2983,6 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm, u32 pasid)
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amdgpu_bo_unreserve(vm->root.bo);
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if (pasid) {
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unsigned long flags;
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spin_lock_irqsave(&adev->vm_manager.pasid_lock, flags);
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r = idr_alloc(&adev->vm_manager.pasid_idr, vm, pasid, pasid + 1,
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GFP_ATOMIC);
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spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags);
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if (r < 0)
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goto error_free_root;
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vm->pasid = pasid;
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}
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INIT_KFIFO(vm->faults);
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return 0;
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@@ -3012,7 +3038,6 @@ static int amdgpu_vm_check_clean_reserved(struct amdgpu_device *adev,
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*
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* @adev: amdgpu_device pointer
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* @vm: requested vm
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* @pasid: pasid to use
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*
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* This only works on GFX VMs that don't have any BOs added and no
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* page tables allocated yet.
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@@ -3020,7 +3045,6 @@ static int amdgpu_vm_check_clean_reserved(struct amdgpu_device *adev,
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* Changes the following VM parameters:
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* - use_cpu_for_update
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* - pte_supports_ats
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* - pasid (old PASID is released, because compute manages its own PASIDs)
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*
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* Reinitializes the page directory to reflect the changed ATS
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* setting.
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@@ -3028,8 +3052,7 @@ static int amdgpu_vm_check_clean_reserved(struct amdgpu_device *adev,
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* Returns:
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* 0 for success, -errno for errors.
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*/
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int amdgpu_vm_make_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm,
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u32 pasid)
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int amdgpu_vm_make_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm)
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{
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bool pte_support_ats = (adev->asic_type == CHIP_RAVEN);
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int r;
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@@ -3043,19 +3066,6 @@ int amdgpu_vm_make_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm,
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if (r)
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goto unreserve_bo;
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if (pasid) {
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unsigned long flags;
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spin_lock_irqsave(&adev->vm_manager.pasid_lock, flags);
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r = idr_alloc(&adev->vm_manager.pasid_idr, vm, pasid, pasid + 1,
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GFP_ATOMIC);
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spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags);
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if (r == -ENOSPC)
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goto unreserve_bo;
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r = 0;
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}
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/* Check if PD needs to be reinitialized and do it before
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* changing any other state, in case it fails.
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*/
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@@ -3065,7 +3075,7 @@ int amdgpu_vm_make_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm,
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to_amdgpu_bo_vm(vm->root.bo),
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false);
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if (r)
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goto free_idr;
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goto unreserve_bo;
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}
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/* Update VM state */
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@@ -3082,7 +3092,7 @@ int amdgpu_vm_make_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm,
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r = amdgpu_bo_sync_wait(vm->root.bo,
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AMDGPU_FENCE_OWNER_UNDEFINED, true);
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if (r)
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goto free_idr;
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goto unreserve_bo;
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vm->update_funcs = &amdgpu_vm_cpu_funcs;
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} else {
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@@ -3092,36 +3102,11 @@ int amdgpu_vm_make_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm,
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vm->last_update = NULL;
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vm->is_compute_context = true;
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if (vm->pasid) {
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unsigned long flags;
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spin_lock_irqsave(&adev->vm_manager.pasid_lock, flags);
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idr_remove(&adev->vm_manager.pasid_idr, vm->pasid);
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spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags);
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/* Free the original amdgpu allocated pasid
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* Will be replaced with kfd allocated pasid
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*/
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amdgpu_pasid_free(vm->pasid);
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vm->pasid = 0;
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}
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/* Free the shadow bo for compute VM */
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amdgpu_bo_unref(&to_amdgpu_bo_vm(vm->root.bo)->shadow);
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if (pasid)
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vm->pasid = pasid;
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goto unreserve_bo;
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free_idr:
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if (pasid) {
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unsigned long flags;
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spin_lock_irqsave(&adev->vm_manager.pasid_lock, flags);
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idr_remove(&adev->vm_manager.pasid_idr, pasid);
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spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags);
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}
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unreserve_bo:
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amdgpu_bo_unreserve(vm->root.bo);
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return r;
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@@ -3137,14 +3122,7 @@ unreserve_bo:
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*/
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void amdgpu_vm_release_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm)
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{
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if (vm->pasid) {
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unsigned long flags;
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spin_lock_irqsave(&adev->vm_manager.pasid_lock, flags);
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idr_remove(&adev->vm_manager.pasid_idr, vm->pasid);
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spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags);
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}
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vm->pasid = 0;
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amdgpu_vm_set_pasid(adev, vm, 0);
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vm->is_compute_context = false;
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}
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@@ -3168,15 +3146,7 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm)
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root = amdgpu_bo_ref(vm->root.bo);
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amdgpu_bo_reserve(root, true);
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if (vm->pasid) {
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unsigned long flags;
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spin_lock_irqsave(&adev->vm_manager.pasid_lock, flags);
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idr_remove(&adev->vm_manager.pasid_idr, vm->pasid);
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spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags);
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vm->pasid = 0;
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}
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amdgpu_vm_set_pasid(adev, vm, 0);
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dma_fence_wait(vm->last_unlocked, false);
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dma_fence_put(vm->last_unlocked);
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@@ -3258,8 +3228,7 @@ void amdgpu_vm_manager_init(struct amdgpu_device *adev)
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adev->vm_manager.vm_update_mode = 0;
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#endif
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idr_init(&adev->vm_manager.pasid_idr);
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spin_lock_init(&adev->vm_manager.pasid_lock);
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xa_init_flags(&adev->vm_manager.pasids, XA_FLAGS_LOCK_IRQ);
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}
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/**
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@@ -3271,8 +3240,8 @@ void amdgpu_vm_manager_init(struct amdgpu_device *adev)
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*/
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void amdgpu_vm_manager_fini(struct amdgpu_device *adev)
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{
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WARN_ON(!idr_is_empty(&adev->vm_manager.pasid_idr));
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idr_destroy(&adev->vm_manager.pasid_idr);
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WARN_ON(!xa_empty(&adev->vm_manager.pasids));
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xa_destroy(&adev->vm_manager.pasids);
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amdgpu_vmid_mgr_fini(adev);
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}
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@@ -3341,13 +3310,13 @@ void amdgpu_vm_get_task_info(struct amdgpu_device *adev, u32 pasid,
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struct amdgpu_vm *vm;
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unsigned long flags;
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spin_lock_irqsave(&adev->vm_manager.pasid_lock, flags);
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xa_lock_irqsave(&adev->vm_manager.pasids, flags);
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vm = idr_find(&adev->vm_manager.pasid_idr, pasid);
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vm = xa_load(&adev->vm_manager.pasids, pasid);
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if (vm)
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*task_info = vm->task_info;
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spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, flags);
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xa_unlock_irqrestore(&adev->vm_manager.pasids, flags);
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}
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/**
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@@ -3389,15 +3358,15 @@ bool amdgpu_vm_handle_fault(struct amdgpu_device *adev, u32 pasid,
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struct amdgpu_vm *vm;
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int r;
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spin_lock_irqsave(&adev->vm_manager.pasid_lock, irqflags);
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vm = idr_find(&adev->vm_manager.pasid_idr, pasid);
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xa_lock_irqsave(&adev->vm_manager.pasids, irqflags);
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vm = xa_load(&adev->vm_manager.pasids, pasid);
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if (vm) {
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root = amdgpu_bo_ref(vm->root.bo);
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is_compute_context = vm->is_compute_context;
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} else {
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root = NULL;
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}
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spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, irqflags);
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xa_unlock_irqrestore(&adev->vm_manager.pasids, irqflags);
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if (!root)
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return false;
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@@ -3415,11 +3384,11 @@ bool amdgpu_vm_handle_fault(struct amdgpu_device *adev, u32 pasid,
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goto error_unref;
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/* Double check that the VM still exists */
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spin_lock_irqsave(&adev->vm_manager.pasid_lock, irqflags);
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vm = idr_find(&adev->vm_manager.pasid_idr, pasid);
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xa_lock_irqsave(&adev->vm_manager.pasids, irqflags);
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vm = xa_load(&adev->vm_manager.pasids, pasid);
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if (vm && vm->root.bo != root)
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vm = NULL;
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spin_unlock_irqrestore(&adev->vm_manager.pasid_lock, irqflags);
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xa_unlock_irqrestore(&adev->vm_manager.pasids, irqflags);
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if (!vm)
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goto error_unlock;
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