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crypto: hisilicon/qm - get qp num and depth from hardware registers

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Hardware V3 and later versions can obtain qp num and depth supported
by the hardware from registers. To be compatible with later hardware
versions, get qp num and depth from registers instead of fixed marcos.

Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Weili Qian
2022-09-09 17:46:56 +08:00
committed by Herbert Xu
parent 82f00b24f5
commit 129a9f3401
8 changed files with 202 additions and 134 deletions
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5
drivers/crypto/hisilicon/sec2/sec.h
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@@ -17,6 +17,7 @@ struct sec_alg_res {
dma_addr_t a_ivin_dma;
u8 *out_mac;
dma_addr_t out_mac_dma;
u16 depth;
};
/* Cipher request of SEC private */
@@ -115,9 +116,9 @@ struct sec_cipher_ctx {
/* SEC queue context which defines queue's relatives */
struct sec_qp_ctx {
struct hisi_qp *qp;
struct sec_req *req_list[QM_Q_DEPTH];
struct sec_req **req_list;
struct idr req_idr;
struct sec_alg_res res[QM_Q_DEPTH];
struct sec_alg_res *res;
struct sec_ctx *ctx;
spinlock_t req_lock;
struct list_head backlog;