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drm/amdgpu: rework TLB flushing
Instead of tracking the VM updates through the dependencies just use a sequence counter for page table updates which indicates the need to flush the TLB. This reduces the need to flush the TLB drastically. v2: squash in NULL check fix (Christian) Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
committed by
Alex Deucher
parent
e997b82745
commit
5255e146c9
@@ -810,7 +810,7 @@ static int amdgpu_cs_vm_handling(struct amdgpu_cs_parser *p)
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if (r)
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return r;
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r = amdgpu_sync_vm_fence(&p->job->sync, fpriv->prt_va->last_pt_update);
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r = amdgpu_sync_fence(&p->job->sync, fpriv->prt_va->last_pt_update);
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if (r)
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return r;
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@@ -821,7 +821,7 @@ static int amdgpu_cs_vm_handling(struct amdgpu_cs_parser *p)
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if (r)
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return r;
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r = amdgpu_sync_vm_fence(&p->job->sync, bo_va->last_pt_update);
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r = amdgpu_sync_fence(&p->job->sync, bo_va->last_pt_update);
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if (r)
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return r;
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}
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@@ -840,7 +840,7 @@ static int amdgpu_cs_vm_handling(struct amdgpu_cs_parser *p)
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if (r)
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return r;
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r = amdgpu_sync_vm_fence(&p->job->sync, bo_va->last_pt_update);
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r = amdgpu_sync_fence(&p->job->sync, bo_va->last_pt_update);
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if (r)
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return r;
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}
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@@ -853,7 +853,7 @@ static int amdgpu_cs_vm_handling(struct amdgpu_cs_parser *p)
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if (r)
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return r;
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r = amdgpu_sync_vm_fence(&p->job->sync, vm->last_update);
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r = amdgpu_sync_fence(&p->job->sync, vm->last_update);
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if (r)
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return r;
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