drm/amdgpu: remove DRM_AMDGPU_NAVI3X_USERQ config for UQ

DRM_AMDGPU_NAVI3X_USERQ config support is not required for
usermode queue.

v2: rebase.

Cc: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com>
Reviewed-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Arvind Yadav <Arvind.Yadav@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Arvind Yadav
2025-04-22 19:29:03 +05:30
committed by Alex Deucher
parent 716ad3c28f
commit 56801cb83c
10 changed files with 4 additions and 56 deletions

View File

@@ -216,7 +216,6 @@ void amdgpu_userq_fence_driver_put(struct amdgpu_userq_fence_driver *fence_drv)
kref_put(&fence_drv->refcount, amdgpu_userq_fence_driver_destroy);
}
#ifdef CONFIG_DRM_AMDGPU_NAVI3X_USERQ
static int amdgpu_userq_fence_alloc(struct amdgpu_userq_fence **userq_fence)
{
*userq_fence = kmem_cache_alloc(amdgpu_userq_fence_slab, GFP_ATOMIC);
@@ -288,7 +287,6 @@ static int amdgpu_userq_fence_create(struct amdgpu_usermode_queue *userq,
return 0;
}
#endif
static const char *amdgpu_userq_fence_get_driver_name(struct dma_fence *f)
{
@@ -343,7 +341,6 @@ static const struct dma_fence_ops amdgpu_userq_fence_ops = {
.release = amdgpu_userq_fence_release,
};
#ifdef CONFIG_DRM_AMDGPU_NAVI3X_USERQ
/**
* amdgpu_userq_fence_read_wptr - Read the userq wptr value
*
@@ -594,15 +591,7 @@ free_syncobj_handles:
return r;
}
#else
int amdgpu_userq_signal_ioctl(struct drm_device *dev, void *data,
struct drm_file *filp)
{
return -ENOTSUPP;
}
#endif
#ifdef CONFIG_DRM_AMDGPU_NAVI3X_USERQ
int amdgpu_userq_wait_ioctl(struct drm_device *dev, void *data,
struct drm_file *filp)
{
@@ -968,10 +957,3 @@ free_bo_handles_read:
return r;
}
#else
int amdgpu_userq_wait_ioctl(struct drm_device *dev, void *data,
struct drm_file *filp)
{
return -ENOTSUPP;
}
#endif