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synced 2026-04-23 08:55:56 -04:00
drm/amdgpu: simplify Raven, Raven2, and Picasso handling
Treat them all as Raven rather than adding a new picasso asic type. This simplifies a lot of code and also handles the case of rv2 chips with the 0x15d8 pci id. It also fixes dmcu fw handling for picasso. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -91,7 +91,6 @@ static const char *amdgpu_asic_name[] = {
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"VEGA12",
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"VEGA20",
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"RAVEN",
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"PICASSO",
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"LAST",
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};
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@@ -1337,12 +1336,11 @@ static int amdgpu_device_parse_gpu_info_fw(struct amdgpu_device *adev)
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case CHIP_RAVEN:
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if (adev->rev_id >= 8)
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chip_name = "raven2";
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else if (adev->pdev->device == 0x15d8)
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chip_name = "picasso";
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else
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chip_name = "raven";
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break;
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case CHIP_PICASSO:
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chip_name = "picasso";
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break;
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}
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snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_gpu_info.bin", chip_name);
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@@ -1468,8 +1466,7 @@ static int amdgpu_device_ip_early_init(struct amdgpu_device *adev)
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case CHIP_VEGA12:
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case CHIP_VEGA20:
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case CHIP_RAVEN:
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case CHIP_PICASSO:
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if ((adev->asic_type == CHIP_RAVEN) || (adev->asic_type == CHIP_PICASSO))
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if (adev->asic_type == CHIP_RAVEN)
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adev->family = AMDGPU_FAMILY_RV;
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else
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adev->family = AMDGPU_FAMILY_AI;
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@@ -2183,7 +2180,6 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
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case CHIP_VEGA20:
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#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
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case CHIP_RAVEN:
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case CHIP_PICASSO:
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#endif
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return amdgpu_dc != 0;
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#endif
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