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drm/amdgpu: implement lru amdgpu_queue_mgr policy for compute v4
Use an LRU policy to map usermode rings to HW compute queues. Most compute clients use one queue, and usually the first queue available. This results in poor pipe/queue work distribution when multiple compute apps are running. In most cases pipe 0 queue 0 is the only queue that gets used. In order to better distribute work across multiple HW queues, we adopt a policy to map the usermode ring ids to the LRU HW queue. This fixes a large majority of multi-app compute workloads sharing the same HW queue, even though 7 other queues are available. v2: use ring->funcs->type instead of ring->hw_ip v3: remove amdgpu_queue_mapper_funcs v4: change ring_lru_list_lock to spinlock, grab only once in lru_get() Signed-off-by: Andres Rodriguez <andresx7@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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committed by
Alex Deucher
parent
effd924d2f
commit
795f2813e6
@@ -2073,6 +2073,9 @@ int amdgpu_device_init(struct amdgpu_device *adev,
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INIT_LIST_HEAD(&adev->gtt_list);
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spin_lock_init(&adev->gtt_list_lock);
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INIT_LIST_HEAD(&adev->ring_lru_list);
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spin_lock_init(&adev->ring_lru_list_lock);
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INIT_DELAYED_WORK(&adev->late_init_work, amdgpu_late_init_func_handler);
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if (adev->asic_type >= CHIP_BONAIRE) {
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