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drm/amdgpu: modify a pair of functions for the pcie port wreg/rreg
This patch will modify a pair of functions for pcie port wreg/rreg. AMD GPU have had an independent NBIO block from SOC15 arch. If the dirver wants to read/write the address space of the pcie devices, it has to go through the NBIO block. This patch will move the pcie port wreg/rreg functions to "amdgpu_device.c", so that to reuse the functions on the future GPU ASICs. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
committed by
Alex Deucher
parent
479e3b02b7
commit
86700a4026
@@ -5728,3 +5728,36 @@ void amdgpu_device_halt(struct amdgpu_device *adev)
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pci_disable_device(pdev);
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pci_wait_for_pending_transaction(pdev);
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}
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u32 amdgpu_device_pcie_port_rreg(struct amdgpu_device *adev,
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u32 reg)
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{
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unsigned long flags, address, data;
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u32 r;
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address = adev->nbio.funcs->get_pcie_port_index_offset(adev);
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data = adev->nbio.funcs->get_pcie_port_data_offset(adev);
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spin_lock_irqsave(&adev->pcie_idx_lock, flags);
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WREG32(address, reg * 4);
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(void)RREG32(address);
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r = RREG32(data);
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spin_unlock_irqrestore(&adev->pcie_idx_lock, flags);
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return r;
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}
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void amdgpu_device_pcie_port_wreg(struct amdgpu_device *adev,
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u32 reg, u32 v)
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{
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unsigned long flags, address, data;
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address = adev->nbio.funcs->get_pcie_port_index_offset(adev);
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data = adev->nbio.funcs->get_pcie_port_data_offset(adev);
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spin_lock_irqsave(&adev->pcie_idx_lock, flags);
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WREG32(address, reg * 4);
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(void)RREG32(address);
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WREG32(data, v);
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(void)RREG32(data);
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spin_unlock_irqrestore(&adev->pcie_idx_lock, flags);
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}
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