Commit 9287d95e authored by Hirokazu Takata's avatar Hirokazu Takata Committed by Linus Torvalds
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[PATCH] m32r: Support M32104UT target platform

This patch is for supporting a new target platform, Renesas M32104UT
evaluation board.

The M32104UT is an eval board based on an uT-Engine specification.  This board
has an MMU-less M32R family processor, M32104.
http://www-wa0.personal-media.co.jp/pmc/archive/te/te_m32104_e.pdf



This board is one of the most popular M32R platform, so we have ported
Linux/M32R to it.

Signed-off-by: default avatarNaoto Sugai <Sugai.Naoto@ak.MitsubishiElectric.co.jp>
Signed-off-by: default avatarHirokazu Takata <takata@linux-m32r.org>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 60c83c77
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+20 −6
Original line number Diff line number Diff line
@@ -81,6 +81,12 @@ config PLAT_MAPPI2
config PLAT_MAPPI3
       bool "Mappi-III(M3A-2170)"

config PLAT_M32104UT
	bool "M32104UT"
	help
	  The M3T-M32104UT is an reference board based on uT-Engine
	  specification.  This board has a M32104 chip.

endchoice

choice
@@ -93,6 +99,10 @@ config CHIP_M32700
config CHIP_M32102
	bool "M32102"

config CHIP_M32104
	bool "M32104"
	depends on PLAT_M32104UT

config CHIP_VDEC2
       bool "VDEC2"

@@ -115,7 +125,7 @@ config TLB_ENTRIES

config ISA_M32R
        bool
	depends on CHIP_M32102
	depends on CHIP_M32102 || CHIP_M32104
	default y

config ISA_M32R2
@@ -140,6 +150,7 @@ config BUS_CLOCK
	default "50000000" if PLAT_MAPPI3
	default "50000000" if PLAT_M32700UT
	default "50000000" if PLAT_OPSPUT
	default "54000000" if PLAT_M32104UT
	default "33333333" if PLAT_OAKS32R
	default "20000000" if PLAT_MAPPI2

@@ -157,6 +168,7 @@ config MEMORY_START
	default "08000000" if PLAT_USRV
	default "08000000" if PLAT_M32700UT
	default "08000000" if PLAT_OPSPUT
	default "04000000" if PLAT_M32104UT
	default "01000000" if PLAT_OAKS32R

config MEMORY_SIZE
@@ -166,6 +178,7 @@ config MEMORY_SIZE
	default "02000000" if PLAT_USRV
	default "01000000" if PLAT_M32700UT
	default "01000000" if PLAT_OPSPUT
	default "01000000" if PLAT_M32104UT
	default "00800000" if PLAT_OAKS32R

config NOHIGHMEM
@@ -174,21 +187,22 @@ config NOHIGHMEM

config ARCH_DISCONTIGMEM_ENABLE
	bool "Internal RAM Support"
	depends on CHIP_M32700 || CHIP_M32102 || CHIP_VDEC2 || CHIP_OPSP
	depends on CHIP_M32700 || CHIP_M32102 || CHIP_VDEC2 || CHIP_OPSP || CHIP_M32104
	default y

source "mm/Kconfig"

config IRAM_START
	hex "Internal memory start address (hex)"
	default "00f00000"
	depends on (CHIP_M32700 || CHIP_M32102 || CHIP_VDEC2 || CHIP_OPSP) && DISCONTIGMEM
	default "00f00000" if !CHIP_M32104
	default "00700000" if CHIP_M32104
	depends on (CHIP_M32700 || CHIP_M32102 || CHIP_VDEC2 || CHIP_OPSP || CHIP_M32104) && DISCONTIGMEM

config IRAM_SIZE
	hex "Internal memory size (hex)"
	depends on (CHIP_M32700 || CHIP_M32102 || CHIP_VDEC2 || CHIP_OPSP) && DISCONTIGMEM
	depends on (CHIP_M32700 || CHIP_M32102 || CHIP_VDEC2 || CHIP_OPSP || CHIP_M32104) && DISCONTIGMEM
	default "00080000" if CHIP_M32700
	default "00010000" if CHIP_M32102 || CHIP_OPSP
	default "00010000" if CHIP_M32102 || CHIP_OPSP || CHIP_M32104
	default "00008000" if CHIP_VDEC2

#
+5 −0
Original line number Diff line number Diff line
@@ -143,6 +143,11 @@ startup:
	ldi	r0, -2
	ldi	r1, 0x0100	; invalidate
	stb	r1, @r0
#elif defined(CONFIG_CHIP_M32104)
	/* Cache flush */
	ldi	r0, -2
	ldi	r1, 0x0700	; invalidate i-cache, copy back d-cache
	sth	r1, @r0
#else
#error "put your cache flush function, please"
#endif
+9 −0
Original line number Diff line number Diff line
@@ -80,6 +80,10 @@ ENTRY(boot)
	ldi	r1, #0x101		; cache on (with invalidation)
;	ldi	r1, #0x00		; cache off
	st	r1, @r0
#elif defined(CONFIG_CHIP_M32104)
	ldi	r0, #-4              ;LDIMM	(r0, M32R_MCCR)
	ldi	r1, #0x703		; cache on (with invalidation)
	st	r1, @r0
#else
#error unknown chip configuration
#endif
@@ -115,10 +119,15 @@ mmu_on:
	st      r1, @(MATM_offset,r0)		; Set MATM (T bit ON)
	ld      r0, @(MATM_offset,r0)		; Check
#else
#if defined(CONFIG_CHIP_M32700)
	seth	r0,#high(M32R_MCDCAR)
	or3	r0,r0,#low(M32R_MCDCAR)
	ld24	r1,#0x8080
	st	r1,@r0
#elif defined(CONFIG_CHIP_M32104)
	LDIMM	(r2, eit_vector)		; set EVB(cr5)
	mvtc    r2, cr5
#endif
#endif	/* CONFIG_MMU */
	jmp	r13
	nop
+1 −0
Original line number Diff line number Diff line
@@ -16,5 +16,6 @@ obj-$(CONFIG_PLAT_M32700UT) += setup_m32700ut.o io_m32700ut.o
obj-$(CONFIG_PLAT_OPSPUT)	+= setup_opsput.o io_opsput.o
obj-$(CONFIG_MODULES)		+= module.o
obj-$(CONFIG_PLAT_OAKS32R)	+= setup_oaks32r.o io_oaks32r.o
obj-$(CONFIG_PLAT_M32104UT)	+= setup_m32104ut.o io_m32104ut.o

EXTRA_AFLAGS	:= -traditional
+15 −2
Original line number Diff line number Diff line
@@ -315,7 +315,7 @@ ENTRY(ei_handler)
	mv	r1, sp			; arg1(regs)
#if defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2) \
	|| defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \
	|| defined(CONFIG_CHIP_OPSP)
	|| defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)

;    GET_ICU_STATUS;
	seth	r0, #shigh(M32R_ICU_ISTS_ADDR)
@@ -541,7 +541,20 @@ check_int2:
	bra	check_end
	.fillinsn
check_end:
#endif  /* CONFIG_PLAT_OPSPUT */
#elif defined(CONFIG_PLAT_M32104UT)
	add3	r2, r0, #-(M32R_IRQ_INT1)       ; INT1# interrupt
	bnez	r2, check_end
	; read ICU status register of PLD
	seth	r0, #high(PLD_ICUISTS)
	or3	r0, r0, #low(PLD_ICUISTS)
	lduh	r0, @r0
	slli	r0, #21
	srli	r0, #27                         ; ISN
	addi	r0, #(M32104UT_PLD_IRQ_BASE)
	bra	check_end
	.fillinsn
check_end:
#endif  /* CONFIG_PLAT_M32104UT */
	bl	do_IRQ
#endif  /* CONFIG_SMP */
	ld	r14, @sp+
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