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drm/amd/display: remove deprecated pplib interface

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[Why]
The new interface now replaces the old interface for all known
configurations.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Eric Yang
2019-04-10 14:08:53 -04:00
committed by Alex Deucher
parent 27eaa4927d
commit a086705340
3 changed files with 6 additions and 45 deletions
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23
drivers/gpu/drm/amd/display/dc/dm_pp_smu.h
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@@ -74,29 +74,6 @@ struct pp_smu_wm_range_sets {
struct pp_smu_wm_set_range writer_wm_sets[MAX_WATERMARK_SETS];
};
struct pp_smu_display_requirement_rv {
/* PPSMC_MSG_SetDisplayCount: count
* 0 triggers S0i2 optimization
*/
unsigned int display_count;
/* PPSMC_MSG_SetHardMinFclkByFreq: mhz
* FCLK will vary with DPM, but never below requested hard min
*/
unsigned int hard_min_fclk_mhz;
/* PPSMC_MSG_SetHardMinDcefclkByFreq: mhz
* fixed clock at requested freq, either from FCH bypass or DFS
*/
unsigned int hard_min_dcefclk_mhz;
/* PPSMC_MSG_SetMinDeepSleepDcefclk: mhz
* when DF is in cstate, dcf clock is further divided down
* to just above given frequency
*/
unsigned int min_deep_sleep_dcefclk_mhz;
};
struct pp_smu_funcs_rv {
struct pp_smu pp_smu;