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spi: spi-mem: Add an ecc parameter to the spi_mem_op structure
Soon the SPI-NAND core will need a way to request a SPI controller to enable ECC support for a given operation. This is because of the pipelined integration of certain ECC engines, which are directly managed by the SPI controller itself. Introduce a spi_mem_op additional field for this purpose: ecc. So far this field is left unset and checked to be false by all the SPI controller drivers in their ->supports_op() hook, as they all call spi_mem_default_supports_op(). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/linux-mtd/20220127091808.1043392-7-miquel.raynal@bootlin.com
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@@ -89,6 +89,7 @@ enum spi_mem_data_dir {
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* @dummy.dtr: whether the dummy bytes should be sent in DTR mode or not
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* @data.buswidth: number of IO lanes used to send/receive the data
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* @data.dtr: whether the data should be sent in DTR mode or not
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* @data.ecc: whether error correction is required or not
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* @data.dir: direction of the transfer
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* @data.nbytes: number of data bytes to send/receive. Can be zero if the
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* operation does not involve transferring data
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@@ -119,6 +120,7 @@ struct spi_mem_op {
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struct {
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u8 buswidth;
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u8 dtr : 1;
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u8 ecc : 1;
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enum spi_mem_data_dir dir;
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unsigned int nbytes;
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union {
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@@ -288,9 +290,11 @@ struct spi_controller_mem_ops {
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/**
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* struct spi_controller_mem_caps - SPI memory controller capabilities
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* @dtr: Supports DTR operations
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* @ecc: Supports operations with error correction
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*/
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struct spi_controller_mem_caps {
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bool dtr;
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bool ecc;
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};
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#define spi_mem_controller_is_capable(ctlr, cap) \
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