drm/amdgpu: add soc15 support for picasso

Add the IP blocks, clock and powergating flags, and common clockgating support.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Likun Gao
2018-07-10 20:22:36 +08:00
committed by Alex Deucher
parent be9699e392
commit ad5a67a7ea
2 changed files with 27 additions and 1 deletions

View File

@@ -62,6 +62,7 @@
MODULE_FIRMWARE("amdgpu/vega10_gpu_info.bin");
MODULE_FIRMWARE("amdgpu/vega12_gpu_info.bin");
MODULE_FIRMWARE("amdgpu/raven_gpu_info.bin");
MODULE_FIRMWARE("amdgpu/picasso_gpu_info.bin");
#define AMDGPU_RESUME_MS 2000
@@ -1335,6 +1336,9 @@ static int amdgpu_device_parse_gpu_info_fw(struct amdgpu_device *adev)
case CHIP_RAVEN:
chip_name = "raven";
break;
case CHIP_PICASSO:
chip_name = "picasso";
break;
}
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_gpu_info.bin", chip_name);
@@ -1460,7 +1464,8 @@ static int amdgpu_device_ip_early_init(struct amdgpu_device *adev)
case CHIP_VEGA12:
case CHIP_VEGA20:
case CHIP_RAVEN:
if (adev->asic_type == CHIP_RAVEN)
case CHIP_PICASSO:
if ((adev->asic_type == CHIP_RAVEN) || (adev->asic_type == CHIP_PICASSO))
adev->family = AMDGPU_FAMILY_RV;
else
adev->family = AMDGPU_FAMILY_AI;