Loading arch/sh/kernel/Makefile_64 0 → 100644 +21 −0 Original line number Diff line number Diff line extra-y := head.o init_task.o vmlinux.lds obj-y := debugtraps.o io.o io_generic.o irq.o machvec.o process_64.o \ ptrace.o semaphore.o setup.o signal.o sys_sh.o syscalls.o \ time.o topology.o traps.o obj-y += cpu/ timers/ obj-$(CONFIG_VSYSCALL) += vsyscall/ obj-$(CONFIG_SMP) += smp.o obj-$(CONFIG_CF_ENABLER) += cf-enabler.o obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o obj-$(CONFIG_SH_KGDB) += kgdb_stub.o kgdb_jmp.o obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o obj-$(CONFIG_MODULES) += sh_ksyms.o module.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o obj-$(CONFIG_CRASH_DUMP) += crash_dump.o obj-$(CONFIG_PM) += pm.o obj-$(CONFIG_STACKTRACE) += stacktrace.o EXTRA_CFLAGS += -Werror include/asm-sh/processor.h +6 −241 Original line number Diff line number Diff line /* * include/asm-sh/processor.h * * Copyright (C) 1999, 2000 Niibe Yutaka * Copyright (C) 2002, 2003 Paul Mundt */ #ifndef __ASM_SH_PROCESSOR_H #define __ASM_SH_PROCESSOR_H #ifdef __KERNEL__ #include <linux/compiler.h> #include <asm/page.h> #include <asm/types.h> #include <asm/cache.h> #include <asm/ptrace.h> #include <asm/cpu-features.h> /* * Default implementation of macro that returns current * instruction pointer ("program counter"). */ #define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n1:":"=z" (pc)); pc; }) /* Core Processor Version Register */ #define CCN_PVR 0xff000030 #define CCN_CVR 0xff000040 #define CCN_PRR 0xff000044 /* * CPU type and hardware bug flags. Kept separately for each CPU. Loading Loading @@ -57,229 +31,20 @@ enum cpu_type { /* SH4AL-DSP types */ CPU_SH7343, CPU_SH7722, /* SH-5 types */ CPU_SH5_101, CPU_SH5_103, /* Unknown subtype */ CPU_SH_NONE }; struct sh_cpuinfo { unsigned int type; unsigned long loops_per_jiffy; unsigned long asid_cache; struct cache_info icache; /* Primary I-cache */ struct cache_info dcache; /* Primary D-cache */ struct cache_info scache; /* Secondary cache */ unsigned long flags; } __attribute__ ((aligned(L1_CACHE_BYTES))); extern struct sh_cpuinfo cpu_data[]; #define boot_cpu_data cpu_data[0] #define current_cpu_data cpu_data[smp_processor_id()] #define raw_current_cpu_data cpu_data[raw_smp_processor_id()] /* * User space process size: 2GB. * * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff */ #define TASK_SIZE 0x7c000000UL /* This decides where the kernel will search for a free chunk of vm * space during mmap's. */ #define TASK_UNMAPPED_BASE (TASK_SIZE / 3) /* * Bit of SR register * * FD-bit: * When it's set, it means the processor doesn't have right to use FPU, * and it results exception when the floating operation is executed. * * IMASK-bit: * Interrupt level mask */ #define SR_FD 0x00008000 #define SR_DSP 0x00001000 #define SR_IMASK 0x000000f0 /* * FPU structure and data */ struct sh_fpu_hard_struct { unsigned long fp_regs[16]; unsigned long xfp_regs[16]; unsigned long fpscr; unsigned long fpul; long status; /* software status information */ }; /* Dummy fpu emulator */ struct sh_fpu_soft_struct { unsigned long fp_regs[16]; unsigned long xfp_regs[16]; unsigned long fpscr; unsigned long fpul; unsigned char lookahead; unsigned long entry_pc; }; union sh_fpu_union { struct sh_fpu_hard_struct hard; struct sh_fpu_soft_struct soft; }; struct thread_struct { /* Saved registers when thread is descheduled */ unsigned long sp; unsigned long pc; /* Hardware debugging registers */ unsigned long ubc_pc; /* floating point info */ union sh_fpu_union fpu; }; typedef struct { unsigned long seg; } mm_segment_t; /* Count of active tasks with UBC settings */ extern int ubc_usercnt; #define INIT_THREAD { \ .sp = sizeof(init_stack) + (long) &init_stack, \ } /* * Do necessary setup to start up a newly executed thread. */ #define start_thread(regs, new_pc, new_sp) \ set_fs(USER_DS); \ regs->pr = 0; \ regs->sr = SR_FD; /* User mode. */ \ regs->pc = new_pc; \ regs->regs[15] = new_sp /* Forward declaration, a strange C thing */ struct task_struct; struct mm_struct; /* Free all resources held by a thread. */ extern void release_thread(struct task_struct *); /* Prepare to copy thread state - unlazy all lazy status */ #define prepare_to_copy(tsk) do { } while (0) /* * create a kernel thread without removing it from tasklists */ extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); /* Copy and release all segment info associated with a VM */ #define copy_segments(p, mm) do { } while(0) #define release_segments(mm) do { } while(0) /* * FPU lazy state save handling. */ static __inline__ void disable_fpu(void) { unsigned long __dummy; /* Set FD flag in SR */ __asm__ __volatile__("stc sr, %0\n\t" "or %1, %0\n\t" "ldc %0, sr" : "=&r" (__dummy) : "r" (SR_FD)); } static __inline__ void enable_fpu(void) { unsigned long __dummy; /* Clear out FD flag in SR */ __asm__ __volatile__("stc sr, %0\n\t" "and %1, %0\n\t" "ldc %0, sr" : "=&r" (__dummy) : "r" (~SR_FD)); } static __inline__ void release_fpu(struct pt_regs *regs) { regs->sr |= SR_FD; } static __inline__ void grab_fpu(struct pt_regs *regs) { regs->sr &= ~SR_FD; } extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs); #define unlazy_fpu(tsk, regs) do { \ if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \ save_fpu(tsk, regs); \ } \ } while (0) #define clear_fpu(tsk, regs) do { \ if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \ clear_tsk_thread_flag(tsk, TIF_USEDFPU); \ release_fpu(regs); \ } \ } while (0) /* Double presision, NANS as NANS, rounding to nearest, no exceptions */ #define FPSCR_INIT 0x00080000 #define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */ #define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */ /* * Return saved PC of a blocked thread. */ #define thread_saved_pc(tsk) (tsk->thread.pc) void show_trace(struct task_struct *tsk, unsigned long *sp, struct pt_regs *regs); extern unsigned long get_wchan(struct task_struct *p); #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc) #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15]) #define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory") #define cpu_relax() barrier() #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \ defined(CONFIG_CPU_SH4) #define PREFETCH_STRIDE L1_CACHE_BYTES #define ARCH_HAS_PREFETCH #define ARCH_HAS_PREFETCHW static inline void prefetch(void *x) { __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory"); } #define prefetchw(x) prefetch(x) #endif #ifdef CONFIG_VSYSCALL extern int vsyscall_init(void); #ifdef CONFIG_SUPERH32 # include "processor_32.h" #else #define vsyscall_init() do { } while (0) # include "processor_64.h" #endif /* arch/sh/kernel/setup.c */ const char *get_cpu_subtype(struct sh_cpuinfo *c); #endif /* __KERNEL__ */ #endif /* __ASM_SH_PROCESSOR_H */ include/asm-sh/processor_32.h 0 → 100644 +248 −0 Original line number Diff line number Diff line /* * include/asm-sh/processor.h * * Copyright (C) 1999, 2000 Niibe Yutaka * Copyright (C) 2002, 2003 Paul Mundt */ #ifndef __ASM_SH_PROCESSOR_32_H #define __ASM_SH_PROCESSOR_32_H #ifdef __KERNEL__ #include <linux/compiler.h> #include <asm/page.h> #include <asm/types.h> #include <asm/cache.h> #include <asm/ptrace.h> #include <asm/cpu-features.h> /* * Default implementation of macro that returns current * instruction pointer ("program counter"). */ #define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n1:":"=z" (pc)); pc; }) /* Core Processor Version Register */ #define CCN_PVR 0xff000030 #define CCN_CVR 0xff000040 #define CCN_PRR 0xff000044 struct sh_cpuinfo { unsigned int type; unsigned long loops_per_jiffy; unsigned long asid_cache; struct cache_info icache; /* Primary I-cache */ struct cache_info dcache; /* Primary D-cache */ struct cache_info scache; /* Secondary cache */ unsigned long flags; } __attribute__ ((aligned(L1_CACHE_BYTES))); extern struct sh_cpuinfo cpu_data[]; #define boot_cpu_data cpu_data[0] #define current_cpu_data cpu_data[smp_processor_id()] #define raw_current_cpu_data cpu_data[raw_smp_processor_id()] /* * User space process size: 2GB. * * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff */ #define TASK_SIZE 0x7c000000UL /* This decides where the kernel will search for a free chunk of vm * space during mmap's. */ #define TASK_UNMAPPED_BASE (TASK_SIZE / 3) /* * Bit of SR register * * FD-bit: * When it's set, it means the processor doesn't have right to use FPU, * and it results exception when the floating operation is executed. * * IMASK-bit: * Interrupt level mask */ #define SR_FD 0x00008000 #define SR_DSP 0x00001000 #define SR_IMASK 0x000000f0 /* * FPU structure and data */ struct sh_fpu_hard_struct { unsigned long fp_regs[16]; unsigned long xfp_regs[16]; unsigned long fpscr; unsigned long fpul; long status; /* software status information */ }; /* Dummy fpu emulator */ struct sh_fpu_soft_struct { unsigned long fp_regs[16]; unsigned long xfp_regs[16]; unsigned long fpscr; unsigned long fpul; unsigned char lookahead; unsigned long entry_pc; }; union sh_fpu_union { struct sh_fpu_hard_struct hard; struct sh_fpu_soft_struct soft; }; struct thread_struct { /* Saved registers when thread is descheduled */ unsigned long sp; unsigned long pc; /* Hardware debugging registers */ unsigned long ubc_pc; /* floating point info */ union sh_fpu_union fpu; }; typedef struct { unsigned long seg; } mm_segment_t; /* Count of active tasks with UBC settings */ extern int ubc_usercnt; #define INIT_THREAD { \ .sp = sizeof(init_stack) + (long) &init_stack, \ } /* * Do necessary setup to start up a newly executed thread. */ #define start_thread(regs, new_pc, new_sp) \ set_fs(USER_DS); \ regs->pr = 0; \ regs->sr = SR_FD; /* User mode. */ \ regs->pc = new_pc; \ regs->regs[15] = new_sp /* Forward declaration, a strange C thing */ struct task_struct; struct mm_struct; /* Free all resources held by a thread. */ extern void release_thread(struct task_struct *); /* Prepare to copy thread state - unlazy all lazy status */ #define prepare_to_copy(tsk) do { } while (0) /* * create a kernel thread without removing it from tasklists */ extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); /* Copy and release all segment info associated with a VM */ #define copy_segments(p, mm) do { } while(0) #define release_segments(mm) do { } while(0) /* * FPU lazy state save handling. */ static __inline__ void disable_fpu(void) { unsigned long __dummy; /* Set FD flag in SR */ __asm__ __volatile__("stc sr, %0\n\t" "or %1, %0\n\t" "ldc %0, sr" : "=&r" (__dummy) : "r" (SR_FD)); } static __inline__ void enable_fpu(void) { unsigned long __dummy; /* Clear out FD flag in SR */ __asm__ __volatile__("stc sr, %0\n\t" "and %1, %0\n\t" "ldc %0, sr" : "=&r" (__dummy) : "r" (~SR_FD)); } static __inline__ void release_fpu(struct pt_regs *regs) { regs->sr |= SR_FD; } static __inline__ void grab_fpu(struct pt_regs *regs) { regs->sr &= ~SR_FD; } extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs); #define unlazy_fpu(tsk, regs) do { \ if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \ save_fpu(tsk, regs); \ } \ } while (0) #define clear_fpu(tsk, regs) do { \ if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \ clear_tsk_thread_flag(tsk, TIF_USEDFPU); \ release_fpu(regs); \ } \ } while (0) /* Double presision, NANS as NANS, rounding to nearest, no exceptions */ #define FPSCR_INIT 0x00080000 #define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */ #define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */ /* * Return saved PC of a blocked thread. */ #define thread_saved_pc(tsk) (tsk->thread.pc) void show_trace(struct task_struct *tsk, unsigned long *sp, struct pt_regs *regs); extern unsigned long get_wchan(struct task_struct *p); #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc) #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15]) #define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory") #define cpu_relax() barrier() #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \ defined(CONFIG_CPU_SH4) #define PREFETCH_STRIDE L1_CACHE_BYTES #define ARCH_HAS_PREFETCH #define ARCH_HAS_PREFETCHW static inline void prefetch(void *x) { __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory"); } #define prefetchw(x) prefetch(x) #endif #ifdef CONFIG_VSYSCALL extern int vsyscall_init(void); #else #define vsyscall_init() do { } while (0) #endif #endif /* __KERNEL__ */ #endif /* __ASM_SH_PROCESSOR_32_H */ include/asm-sh64/processor.h→include/asm-sh/processor_64.h +18 −28 Original line number Diff line number Diff line #ifndef __ASM_SH64_PROCESSOR_H #define __ASM_SH64_PROCESSOR_H #ifndef __ASM_SH_PROCESSOR_64_H #define __ASM_SH_PROCESSOR_64_H /* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * include/asm-sh64/processor.h * include/asm-sh/processor_64.h * * Copyright (C) 2000, 2001 Paolo Alberelli * Copyright (C) 2003 Paul Mundt * Copyright (C) 2004 Richard Curnow * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #include <asm/page.h> #ifndef __ASSEMBLY__ #include <linux/compiler.h> #include <asm/page.h> #include <asm/types.h> #include <asm/cache.h> #include <asm/registers.h> #include <linux/threads.h> #include <linux/compiler.h> #include <asm/cpu/registers.h> /* * Default implementation of macro that returns current Loading @@ -39,15 +35,6 @@ __asm__("gettr tr0, %1\n\t" \ : "1" (__dummy)); \ pc; }) /* * CPU type and hardware bug flags. Kept separately for each CPU. */ enum cpu_type { CPU_SH5_101, CPU_SH5_103, CPU_SH_NONE }; /* * TLB information structure * Loading Loading @@ -178,6 +165,10 @@ struct thread_struct { union sh_fpu_union fpu; }; typedef struct { unsigned long seg; } mm_segment_t; #define INIT_MMAP \ { &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL } Loading Loading @@ -283,5 +274,4 @@ extern unsigned long get_wchan(struct task_struct *p); #define cpu_relax() barrier() #endif /* __ASSEMBLY__ */ #endif /* __ASM_SH64_PROCESSOR_H */ #endif /* __ASM_SH_PROCESSOR_64_H */ Loading
arch/sh/kernel/Makefile_64 0 → 100644 +21 −0 Original line number Diff line number Diff line extra-y := head.o init_task.o vmlinux.lds obj-y := debugtraps.o io.o io_generic.o irq.o machvec.o process_64.o \ ptrace.o semaphore.o setup.o signal.o sys_sh.o syscalls.o \ time.o topology.o traps.o obj-y += cpu/ timers/ obj-$(CONFIG_VSYSCALL) += vsyscall/ obj-$(CONFIG_SMP) += smp.o obj-$(CONFIG_CF_ENABLER) += cf-enabler.o obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o obj-$(CONFIG_SH_KGDB) += kgdb_stub.o kgdb_jmp.o obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o obj-$(CONFIG_MODULES) += sh_ksyms.o module.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o obj-$(CONFIG_CRASH_DUMP) += crash_dump.o obj-$(CONFIG_PM) += pm.o obj-$(CONFIG_STACKTRACE) += stacktrace.o EXTRA_CFLAGS += -Werror
include/asm-sh/processor.h +6 −241 Original line number Diff line number Diff line /* * include/asm-sh/processor.h * * Copyright (C) 1999, 2000 Niibe Yutaka * Copyright (C) 2002, 2003 Paul Mundt */ #ifndef __ASM_SH_PROCESSOR_H #define __ASM_SH_PROCESSOR_H #ifdef __KERNEL__ #include <linux/compiler.h> #include <asm/page.h> #include <asm/types.h> #include <asm/cache.h> #include <asm/ptrace.h> #include <asm/cpu-features.h> /* * Default implementation of macro that returns current * instruction pointer ("program counter"). */ #define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n1:":"=z" (pc)); pc; }) /* Core Processor Version Register */ #define CCN_PVR 0xff000030 #define CCN_CVR 0xff000040 #define CCN_PRR 0xff000044 /* * CPU type and hardware bug flags. Kept separately for each CPU. Loading Loading @@ -57,229 +31,20 @@ enum cpu_type { /* SH4AL-DSP types */ CPU_SH7343, CPU_SH7722, /* SH-5 types */ CPU_SH5_101, CPU_SH5_103, /* Unknown subtype */ CPU_SH_NONE }; struct sh_cpuinfo { unsigned int type; unsigned long loops_per_jiffy; unsigned long asid_cache; struct cache_info icache; /* Primary I-cache */ struct cache_info dcache; /* Primary D-cache */ struct cache_info scache; /* Secondary cache */ unsigned long flags; } __attribute__ ((aligned(L1_CACHE_BYTES))); extern struct sh_cpuinfo cpu_data[]; #define boot_cpu_data cpu_data[0] #define current_cpu_data cpu_data[smp_processor_id()] #define raw_current_cpu_data cpu_data[raw_smp_processor_id()] /* * User space process size: 2GB. * * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff */ #define TASK_SIZE 0x7c000000UL /* This decides where the kernel will search for a free chunk of vm * space during mmap's. */ #define TASK_UNMAPPED_BASE (TASK_SIZE / 3) /* * Bit of SR register * * FD-bit: * When it's set, it means the processor doesn't have right to use FPU, * and it results exception when the floating operation is executed. * * IMASK-bit: * Interrupt level mask */ #define SR_FD 0x00008000 #define SR_DSP 0x00001000 #define SR_IMASK 0x000000f0 /* * FPU structure and data */ struct sh_fpu_hard_struct { unsigned long fp_regs[16]; unsigned long xfp_regs[16]; unsigned long fpscr; unsigned long fpul; long status; /* software status information */ }; /* Dummy fpu emulator */ struct sh_fpu_soft_struct { unsigned long fp_regs[16]; unsigned long xfp_regs[16]; unsigned long fpscr; unsigned long fpul; unsigned char lookahead; unsigned long entry_pc; }; union sh_fpu_union { struct sh_fpu_hard_struct hard; struct sh_fpu_soft_struct soft; }; struct thread_struct { /* Saved registers when thread is descheduled */ unsigned long sp; unsigned long pc; /* Hardware debugging registers */ unsigned long ubc_pc; /* floating point info */ union sh_fpu_union fpu; }; typedef struct { unsigned long seg; } mm_segment_t; /* Count of active tasks with UBC settings */ extern int ubc_usercnt; #define INIT_THREAD { \ .sp = sizeof(init_stack) + (long) &init_stack, \ } /* * Do necessary setup to start up a newly executed thread. */ #define start_thread(regs, new_pc, new_sp) \ set_fs(USER_DS); \ regs->pr = 0; \ regs->sr = SR_FD; /* User mode. */ \ regs->pc = new_pc; \ regs->regs[15] = new_sp /* Forward declaration, a strange C thing */ struct task_struct; struct mm_struct; /* Free all resources held by a thread. */ extern void release_thread(struct task_struct *); /* Prepare to copy thread state - unlazy all lazy status */ #define prepare_to_copy(tsk) do { } while (0) /* * create a kernel thread without removing it from tasklists */ extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); /* Copy and release all segment info associated with a VM */ #define copy_segments(p, mm) do { } while(0) #define release_segments(mm) do { } while(0) /* * FPU lazy state save handling. */ static __inline__ void disable_fpu(void) { unsigned long __dummy; /* Set FD flag in SR */ __asm__ __volatile__("stc sr, %0\n\t" "or %1, %0\n\t" "ldc %0, sr" : "=&r" (__dummy) : "r" (SR_FD)); } static __inline__ void enable_fpu(void) { unsigned long __dummy; /* Clear out FD flag in SR */ __asm__ __volatile__("stc sr, %0\n\t" "and %1, %0\n\t" "ldc %0, sr" : "=&r" (__dummy) : "r" (~SR_FD)); } static __inline__ void release_fpu(struct pt_regs *regs) { regs->sr |= SR_FD; } static __inline__ void grab_fpu(struct pt_regs *regs) { regs->sr &= ~SR_FD; } extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs); #define unlazy_fpu(tsk, regs) do { \ if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \ save_fpu(tsk, regs); \ } \ } while (0) #define clear_fpu(tsk, regs) do { \ if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \ clear_tsk_thread_flag(tsk, TIF_USEDFPU); \ release_fpu(regs); \ } \ } while (0) /* Double presision, NANS as NANS, rounding to nearest, no exceptions */ #define FPSCR_INIT 0x00080000 #define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */ #define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */ /* * Return saved PC of a blocked thread. */ #define thread_saved_pc(tsk) (tsk->thread.pc) void show_trace(struct task_struct *tsk, unsigned long *sp, struct pt_regs *regs); extern unsigned long get_wchan(struct task_struct *p); #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc) #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15]) #define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory") #define cpu_relax() barrier() #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \ defined(CONFIG_CPU_SH4) #define PREFETCH_STRIDE L1_CACHE_BYTES #define ARCH_HAS_PREFETCH #define ARCH_HAS_PREFETCHW static inline void prefetch(void *x) { __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory"); } #define prefetchw(x) prefetch(x) #endif #ifdef CONFIG_VSYSCALL extern int vsyscall_init(void); #ifdef CONFIG_SUPERH32 # include "processor_32.h" #else #define vsyscall_init() do { } while (0) # include "processor_64.h" #endif /* arch/sh/kernel/setup.c */ const char *get_cpu_subtype(struct sh_cpuinfo *c); #endif /* __KERNEL__ */ #endif /* __ASM_SH_PROCESSOR_H */
include/asm-sh/processor_32.h 0 → 100644 +248 −0 Original line number Diff line number Diff line /* * include/asm-sh/processor.h * * Copyright (C) 1999, 2000 Niibe Yutaka * Copyright (C) 2002, 2003 Paul Mundt */ #ifndef __ASM_SH_PROCESSOR_32_H #define __ASM_SH_PROCESSOR_32_H #ifdef __KERNEL__ #include <linux/compiler.h> #include <asm/page.h> #include <asm/types.h> #include <asm/cache.h> #include <asm/ptrace.h> #include <asm/cpu-features.h> /* * Default implementation of macro that returns current * instruction pointer ("program counter"). */ #define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n1:":"=z" (pc)); pc; }) /* Core Processor Version Register */ #define CCN_PVR 0xff000030 #define CCN_CVR 0xff000040 #define CCN_PRR 0xff000044 struct sh_cpuinfo { unsigned int type; unsigned long loops_per_jiffy; unsigned long asid_cache; struct cache_info icache; /* Primary I-cache */ struct cache_info dcache; /* Primary D-cache */ struct cache_info scache; /* Secondary cache */ unsigned long flags; } __attribute__ ((aligned(L1_CACHE_BYTES))); extern struct sh_cpuinfo cpu_data[]; #define boot_cpu_data cpu_data[0] #define current_cpu_data cpu_data[smp_processor_id()] #define raw_current_cpu_data cpu_data[raw_smp_processor_id()] /* * User space process size: 2GB. * * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff */ #define TASK_SIZE 0x7c000000UL /* This decides where the kernel will search for a free chunk of vm * space during mmap's. */ #define TASK_UNMAPPED_BASE (TASK_SIZE / 3) /* * Bit of SR register * * FD-bit: * When it's set, it means the processor doesn't have right to use FPU, * and it results exception when the floating operation is executed. * * IMASK-bit: * Interrupt level mask */ #define SR_FD 0x00008000 #define SR_DSP 0x00001000 #define SR_IMASK 0x000000f0 /* * FPU structure and data */ struct sh_fpu_hard_struct { unsigned long fp_regs[16]; unsigned long xfp_regs[16]; unsigned long fpscr; unsigned long fpul; long status; /* software status information */ }; /* Dummy fpu emulator */ struct sh_fpu_soft_struct { unsigned long fp_regs[16]; unsigned long xfp_regs[16]; unsigned long fpscr; unsigned long fpul; unsigned char lookahead; unsigned long entry_pc; }; union sh_fpu_union { struct sh_fpu_hard_struct hard; struct sh_fpu_soft_struct soft; }; struct thread_struct { /* Saved registers when thread is descheduled */ unsigned long sp; unsigned long pc; /* Hardware debugging registers */ unsigned long ubc_pc; /* floating point info */ union sh_fpu_union fpu; }; typedef struct { unsigned long seg; } mm_segment_t; /* Count of active tasks with UBC settings */ extern int ubc_usercnt; #define INIT_THREAD { \ .sp = sizeof(init_stack) + (long) &init_stack, \ } /* * Do necessary setup to start up a newly executed thread. */ #define start_thread(regs, new_pc, new_sp) \ set_fs(USER_DS); \ regs->pr = 0; \ regs->sr = SR_FD; /* User mode. */ \ regs->pc = new_pc; \ regs->regs[15] = new_sp /* Forward declaration, a strange C thing */ struct task_struct; struct mm_struct; /* Free all resources held by a thread. */ extern void release_thread(struct task_struct *); /* Prepare to copy thread state - unlazy all lazy status */ #define prepare_to_copy(tsk) do { } while (0) /* * create a kernel thread without removing it from tasklists */ extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); /* Copy and release all segment info associated with a VM */ #define copy_segments(p, mm) do { } while(0) #define release_segments(mm) do { } while(0) /* * FPU lazy state save handling. */ static __inline__ void disable_fpu(void) { unsigned long __dummy; /* Set FD flag in SR */ __asm__ __volatile__("stc sr, %0\n\t" "or %1, %0\n\t" "ldc %0, sr" : "=&r" (__dummy) : "r" (SR_FD)); } static __inline__ void enable_fpu(void) { unsigned long __dummy; /* Clear out FD flag in SR */ __asm__ __volatile__("stc sr, %0\n\t" "and %1, %0\n\t" "ldc %0, sr" : "=&r" (__dummy) : "r" (~SR_FD)); } static __inline__ void release_fpu(struct pt_regs *regs) { regs->sr |= SR_FD; } static __inline__ void grab_fpu(struct pt_regs *regs) { regs->sr &= ~SR_FD; } extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs); #define unlazy_fpu(tsk, regs) do { \ if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \ save_fpu(tsk, regs); \ } \ } while (0) #define clear_fpu(tsk, regs) do { \ if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \ clear_tsk_thread_flag(tsk, TIF_USEDFPU); \ release_fpu(regs); \ } \ } while (0) /* Double presision, NANS as NANS, rounding to nearest, no exceptions */ #define FPSCR_INIT 0x00080000 #define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */ #define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */ /* * Return saved PC of a blocked thread. */ #define thread_saved_pc(tsk) (tsk->thread.pc) void show_trace(struct task_struct *tsk, unsigned long *sp, struct pt_regs *regs); extern unsigned long get_wchan(struct task_struct *p); #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc) #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15]) #define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory") #define cpu_relax() barrier() #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \ defined(CONFIG_CPU_SH4) #define PREFETCH_STRIDE L1_CACHE_BYTES #define ARCH_HAS_PREFETCH #define ARCH_HAS_PREFETCHW static inline void prefetch(void *x) { __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory"); } #define prefetchw(x) prefetch(x) #endif #ifdef CONFIG_VSYSCALL extern int vsyscall_init(void); #else #define vsyscall_init() do { } while (0) #endif #endif /* __KERNEL__ */ #endif /* __ASM_SH_PROCESSOR_32_H */
include/asm-sh64/processor.h→include/asm-sh/processor_64.h +18 −28 Original line number Diff line number Diff line #ifndef __ASM_SH64_PROCESSOR_H #define __ASM_SH64_PROCESSOR_H #ifndef __ASM_SH_PROCESSOR_64_H #define __ASM_SH_PROCESSOR_64_H /* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * include/asm-sh64/processor.h * include/asm-sh/processor_64.h * * Copyright (C) 2000, 2001 Paolo Alberelli * Copyright (C) 2003 Paul Mundt * Copyright (C) 2004 Richard Curnow * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #include <asm/page.h> #ifndef __ASSEMBLY__ #include <linux/compiler.h> #include <asm/page.h> #include <asm/types.h> #include <asm/cache.h> #include <asm/registers.h> #include <linux/threads.h> #include <linux/compiler.h> #include <asm/cpu/registers.h> /* * Default implementation of macro that returns current Loading @@ -39,15 +35,6 @@ __asm__("gettr tr0, %1\n\t" \ : "1" (__dummy)); \ pc; }) /* * CPU type and hardware bug flags. Kept separately for each CPU. */ enum cpu_type { CPU_SH5_101, CPU_SH5_103, CPU_SH_NONE }; /* * TLB information structure * Loading Loading @@ -178,6 +165,10 @@ struct thread_struct { union sh_fpu_union fpu; }; typedef struct { unsigned long seg; } mm_segment_t; #define INIT_MMAP \ { &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL } Loading Loading @@ -283,5 +274,4 @@ extern unsigned long get_wchan(struct task_struct *p); #define cpu_relax() barrier() #endif /* __ASSEMBLY__ */ #endif /* __ASM_SH64_PROCESSOR_H */ #endif /* __ASM_SH_PROCESSOR_64_H */