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drm/amdgpu: Fetch NPS mode for GCv9.4.3 VFs
Use the memory ranges published in discovery table to deduce NPS mode of GC v9.4.3 VFs. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Vignesh Chander <Vignesh.Chander@amd.com> Tested-by: Vignesh Chander <Vignesh.Chander@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -1244,14 +1244,14 @@ void amdgpu_gmc_sysfs_fini(struct amdgpu_device *adev)
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int amdgpu_gmc_get_nps_memranges(struct amdgpu_device *adev,
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struct amdgpu_mem_partition_info *mem_ranges,
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int exp_ranges)
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uint8_t *exp_ranges)
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{
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struct amdgpu_gmc_memrange *ranges;
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int range_cnt, ret, i, j;
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uint32_t nps_type;
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bool refresh;
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if (!mem_ranges)
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if (!mem_ranges || !exp_ranges)
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return -EINVAL;
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refresh = (adev->init_lvl->level != AMDGPU_INIT_LEVEL_MINIMAL_XGMI) &&
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@@ -1265,16 +1265,16 @@ int amdgpu_gmc_get_nps_memranges(struct amdgpu_device *adev,
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/* TODO: For now, expect ranges and partition count to be the same.
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* Adjust if there are holes expected in any NPS domain.
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*/
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if (range_cnt != exp_ranges) {
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if (*exp_ranges && (range_cnt != *exp_ranges)) {
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dev_warn(
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adev->dev,
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"NPS config mismatch - expected ranges: %d discovery - nps mode: %d, nps ranges: %d",
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exp_ranges, nps_type, range_cnt);
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*exp_ranges, nps_type, range_cnt);
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ret = -EINVAL;
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goto err;
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}
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for (i = 0; i < exp_ranges; ++i) {
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for (i = 0; i < range_cnt; ++i) {
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if (ranges[i].base_address >= ranges[i].limit_address) {
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dev_warn(
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adev->dev,
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@@ -1315,6 +1315,8 @@ int amdgpu_gmc_get_nps_memranges(struct amdgpu_device *adev,
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ranges[i].limit_address - ranges[i].base_address + 1;
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}
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if (!*exp_ranges)
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*exp_ranges = range_cnt;
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err:
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kfree(ranges);
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