MIPS: Introduce machinery for testing for MIPSxxR1/2.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

include/asm-mips/cpu-features.h

@@ -144,6 +144,18 @@
 # ifndef cpu_has_64bit_addresses
 # define cpu_has_64bit_addresses	0
 # endif
+# ifndef cpu_has_mips32r1
+# define cpu_has_mips32r1	(cpu_data[0].isa_level & MIPS_CPU_ISA_M32R1)
+# endif
+# ifndef cpu_has_mips32r2
+# define cpu_has_mips32r2	(cpu_data[0].isa_level & MIPS_CPU_ISA_M32R2)
+# endif
+# ifndef cpu_has_mips64r1
+# define cpu_has_mips64r1	0
+# endif
+# ifndef cpu_has_mips64r2
+# define cpu_has_mips64r2	0
+# endif
 #endif
 
 #ifdef CONFIG_64BIT
@@ -162,6 +174,18 @@
 # ifndef cpu_has_64bit_addresses
 # define cpu_has_64bit_addresses	1
 # endif
+# ifndef cpu_has_mips32r1
+# define cpu_has_mips32r1	0
+# endif
+# ifndef cpu_has_mips32r2
+# define cpu_has_mips32r2	0
+# endif
+# ifndef cpu_has_mips64r1
+# define cpu_has_mips64r1	(cpu_data[0].isa_level & MIPS_CPU_ISA_M64R1)
+# endif
+# ifndef cpu_has_mips64r2
+# define cpu_has_mips64r2	(cpu_data[0].isa_level & MIPS_CPU_ISA_M64R2)
+# endif
 #endif
 
 #ifdef CONFIG_CPU_MIPSR2

include/asm-mips/cpu.h

@@ -210,7 +210,9 @@
 #define MIPS_CPU_ISA_IV		(0x00000004 | MIPS_CPU_ISA_64BIT)
 #define MIPS_CPU_ISA_V		(0x00000005 | MIPS_CPU_ISA_64BIT)
 #define MIPS_CPU_ISA_M32R1	0x00000020
-#define MIPS_CPU_ISA_M64R1	(0x00000040 | MIPS_CPU_ISA_64BIT)
+#define MIPS_CPU_ISA_M32R2	0x00000040
+#define MIPS_CPU_ISA_M64R1	(0x00000080 | MIPS_CPU_ISA_64BIT)
+#define MIPS_CPU_ISA_M64R2	(0x00000100 | MIPS_CPU_ISA_64BIT)
 
 /*
  * CPU Option encodings

include/asm-mips/mach-ip22/cpu-feature-overrides.h

@@ -34,4 +34,9 @@
 #define cpu_has_nofpuex		0
 #define cpu_has_64bits		1
 
+#define cpu_has_mips32r1	0
+#define cpu_has_mips32r2	0
+#define cpu_has_mips64r1	0
+#define cpu_has_mips64r2	0
+
 #endif /* __ASM_MACH_IP22_CPU_FEATURE_OVERRIDES_H */

include/asm-mips/mach-ip27/cpu-feature-overrides.h

@@ -37,4 +37,9 @@
 #define cpu_icache_line_size()	64
 #define cpu_scache_line_size()	128
 
+#define cpu_has_mips32r1	0
+#define cpu_has_mips32r2	0
+#define cpu_has_mips64r1	0
+#define cpu_has_mips64r2	0
+
 #endif /* __ASM_MACH_IP27_CPU_FEATURE_OVERRIDES_H */

include/asm-mips/mach-ip32/cpu-feature-overrides.h

@@ -39,4 +39,9 @@
 #define cpu_has_ic_fills_f_dc	0
 #define cpu_has_dsp		0
 
+#define cpu_has_mips32r1	0
+#define cpu_has_mips32r2	0
+#define cpu_has_mips64r1	0
+#define cpu_has_mips64r2	0
+
 #endif /* __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H */

include/asm-mips/mach-ja/cpu-feature-overrides.h

@@ -37,4 +37,9 @@
 #define cpu_icache_line_size()	32
 #define cpu_scache_line_size()	32
 
+#define cpu_has_mips32r1	0
+#define cpu_has_mips32r2	0
+#define cpu_has_mips64r1	0
+#define cpu_has_mips64r2	0
+
 #endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */

include/asm-mips/mach-ocelot3/cpu-feature-overrides.h

@@ -40,4 +40,9 @@
 #define cpu_icache_line_size()	32
 #define cpu_scache_line_size()	32
 
+#define cpu_has_mips32r1	0
+#define cpu_has_mips32r2	0
+#define cpu_has_mips64r1	0
+#define cpu_has_mips64r2	0
+
 #endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */

include/asm-mips/mach-rm200/cpu-feature-overrides.h

@@ -40,4 +40,9 @@
 #define cpu_icache_line_size()	32
 #define cpu_scache_line_size()	0	/* No S-cache on R5000 I think ...  */
 
+#define cpu_has_mips32r1	0
+#define cpu_has_mips32r2	0
+#define cpu_has_mips64r1	0
+#define cpu_has_mips64r2	0
+
 #endif /* __ASM_MACH_RM200_CPU_FEATURE_OVERRIDES_H */

include/asm-mips/mach-yosemite/cpu-feature-overrides.h

@@ -37,4 +37,9 @@
 #define cpu_icache_line_size()	32
 #define cpu_scache_line_size()	32
 
+#define cpu_has_mips32r1	0
+#define cpu_has_mips32r2	0
+#define cpu_has_mips64r1	0
+#define cpu_has_mips64r2	0
+
 #endif /* __ASM_MACH_YOSEMITE_CPU_FEATURE_OVERRIDES_H */