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drm/amdgpu: cleanup conditional execution
First of all calculating the number of dw to patch into a conditional execution is not something HW generation specific. This is just standard ring buffer calculations. While at it also reduce the BUG_ON() into WARN_ON(). Then instead of a random bit pattern use 0 as default value for the number of dw skipped, this way it's not mandatory any more to patch the conditional execution. And last make the address to check a parameter of the conditional execution instead of getting this from the ring. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
committed by
Alex Deucher
parent
86e14a7386
commit
c68cbbfd54
@@ -658,7 +658,7 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
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bool vm_flush_needed = job->vm_needs_flush;
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struct dma_fence *fence = NULL;
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bool pasid_mapping_needed = false;
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unsigned patch_offset = 0;
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unsigned int patch;
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int r;
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if (amdgpu_vmid_had_gpu_reset(adev, id)) {
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@@ -685,7 +685,8 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
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amdgpu_ring_ib_begin(ring);
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if (ring->funcs->init_cond_exec)
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patch_offset = amdgpu_ring_init_cond_exec(ring);
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patch = amdgpu_ring_init_cond_exec(ring,
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ring->cond_exe_gpu_addr);
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if (need_pipe_sync)
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amdgpu_ring_emit_pipeline_sync(ring);
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@@ -733,8 +734,7 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
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}
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dma_fence_put(fence);
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if (ring->funcs->patch_cond_exec)
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amdgpu_ring_patch_cond_exec(ring, patch_offset);
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amdgpu_ring_patch_cond_exec(ring, patch);
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/* the double SWITCH_BUFFER here *cannot* be skipped by COND_EXEC */
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if (ring->funcs->emit_switch_buffer) {
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