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drm/amd/display: Rework CRTC color management
[Why] To prepare for the upcoming DRM plane color management properties we need to correct a lot of wrong behavior and assumptions made for CRTC color management. The documentation added by this commit in amdgpu_dm_color explains how the HW color pipeline works and its limitations with the DRM interface. The current implementation does the following wrong: - Implicit sRGB DGM when no CRTC DGM is set - Implicit sRGB RGM when no CRTC RGM is set - No way to specify a non-linear DGM matrix that produces correct output - No way to specify a correct RGM when a linear DGM is used We had workarounds for passing kms_color tests but not all of the behavior we had wrong was covered by these tests (especially when it comes to non-linear DGM). Testing both DGM and RGM at the same time isn't something kms_color tests well either. [How] The specifics for how color management works in AMDGPU and the new behavior can be found by reading the documentation added to amdgpu_dm_color.c from this patch. All of the incorrect cases from the old implementation have been addressed for the atomic interface, but there still a few TODOs for the legacy one. Note: this does cause regressions for kms_color@pipe-a-ctm-* over HDMI. The result looks correct from visual inspection but the CRC no longer matches. For reference, the test was previously doing the following: linear degamma -> CTM -> sRGB regamma -> RGB to YUV (709) -> ... Now the test is doing: linear degamma -> CTM -> linear regamma -> RGB to YUV (709) -> ... Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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committed by
Alex Deucher
parent
043f5bb630
commit
cf020d49b3
@@ -278,6 +278,9 @@ struct dm_crtc_state {
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struct drm_crtc_state base;
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struct dc_stream_state *stream;
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bool cm_has_degamma;
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bool cm_is_degamma_srgb;
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int active_planes;
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bool interrupts_enabled;
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@@ -367,10 +370,9 @@ void amdgpu_dm_crtc_handle_crc_irq(struct drm_crtc *crtc);
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#define MAX_COLOR_LEGACY_LUT_ENTRIES 256
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void amdgpu_dm_init_color_mod(void);
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int amdgpu_dm_set_degamma_lut(struct drm_crtc_state *crtc_state,
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struct dc_plane_state *dc_plane_state);
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void amdgpu_dm_set_ctm(struct dm_crtc_state *crtc);
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int amdgpu_dm_set_regamma_lut(struct dm_crtc_state *crtc);
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int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc);
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int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,
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struct dc_plane_state *dc_plane_state);
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extern const struct drm_encoder_helper_funcs amdgpu_dm_encoder_helper_funcs;
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