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https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git/
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e9f6870bb7
Add aes-gcm crypto API's for AMD/Xilinx Versal device. Signed-off-by: Harsh Jain <h.jain@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
120 lines
2.9 KiB
C
120 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Firmware layer for XilSECURE APIs.
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*
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* Copyright (C) 2014-2022 Xilinx, Inc.
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* Copyright (C) 2022-2025 Advanced Micro Devices, Inc.
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*/
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#ifndef __FIRMWARE_XLNX_ZYNQMP_CRYPTO_H__
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#define __FIRMWARE_XLNX_ZYNQMP_CRYPTO_H__
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/**
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* struct xlnx_feature - Feature data
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* @family: Family code of platform
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* @subfamily: Subfamily code of platform
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* @feature_id: Feature id of module
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* @data: Collection of all supported platform data
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*/
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struct xlnx_feature {
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u32 family;
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u32 feature_id;
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void *data;
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};
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/* xilSecure API commands module id + api id */
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#define XSECURE_API_AES_INIT 0x509
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#define XSECURE_API_AES_OP_INIT 0x50a
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#define XSECURE_API_AES_UPDATE_AAD 0x50b
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#define XSECURE_API_AES_ENCRYPT_UPDATE 0x50c
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#define XSECURE_API_AES_ENCRYPT_FINAL 0x50d
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#define XSECURE_API_AES_DECRYPT_UPDATE 0x50e
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#define XSECURE_API_AES_DECRYPT_FINAL 0x50f
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#define XSECURE_API_AES_KEY_ZERO 0x510
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#define XSECURE_API_AES_WRITE_KEY 0x511
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#if IS_REACHABLE(CONFIG_ZYNQMP_FIRMWARE)
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int zynqmp_pm_aes_engine(const u64 address, u32 *out);
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int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags);
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void *xlnx_get_crypto_dev_data(struct xlnx_feature *feature_map);
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int versal_pm_aes_key_write(const u32 keylen,
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const u32 keysrc, const u64 keyaddr);
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int versal_pm_aes_key_zero(const u32 keysrc);
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int versal_pm_aes_op_init(const u64 hw_req);
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int versal_pm_aes_update_aad(const u64 aad_addr, const u32 aad_len);
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int versal_pm_aes_enc_update(const u64 in_params, const u64 in_addr);
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int versal_pm_aes_dec_update(const u64 in_params, const u64 in_addr);
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int versal_pm_aes_dec_final(const u64 gcm_addr);
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int versal_pm_aes_enc_final(const u64 gcm_addr);
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int versal_pm_aes_init(void);
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#else
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static inline int zynqmp_pm_aes_engine(const u64 address, u32 *out)
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{
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return -ENODEV;
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}
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static inline int zynqmp_pm_sha_hash(const u64 address, const u32 size,
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const u32 flags)
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{
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return -ENODEV;
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}
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static inline void *xlnx_get_crypto_dev_data(struct xlnx_feature *feature_map)
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{
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return ERR_PTR(-ENODEV);
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}
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static inline int versal_pm_aes_key_write(const u32 keylen,
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const u32 keysrc, const u64 keyaddr)
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{
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return -ENODEV;
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}
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static inline int versal_pm_aes_key_zero(const u32 keysrc)
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{
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return -ENODEV;
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}
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static inline int versal_pm_aes_op_init(const u64 hw_req)
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{
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return -ENODEV;
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}
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static inline int versal_pm_aes_update_aad(const u64 aad_addr,
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const u32 aad_len)
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{
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return -ENODEV;
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}
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static inline int versal_pm_aes_enc_update(const u64 in_params,
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const u64 in_addr)
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{
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return -ENODEV;
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}
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static inline int versal_pm_aes_dec_update(const u64 in_params,
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const u64 in_addr)
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{
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return -ENODEV;
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}
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static inline int versal_pm_aes_enc_final(const u64 gcm_addr)
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{
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return -ENODEV;
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}
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static inline int versal_pm_aes_dec_final(const u64 gcm_addr)
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{
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return -ENODEV;
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}
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static inline int versal_pm_aes_init(void)
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{
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return -ENODEV;
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}
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#endif
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#endif /* __FIRMWARE_XLNX_ZYNQMP_CRYPTO_H__ */
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