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7adc1b98bb
The current rk3399 cru DT node gives warnings like: 'clocks' is a dependency of 'assigned-clocks'. With the YAML conversion somehow "assigned-xxx" properties where added. If a proper clock is added to the cru node these properties are no longer needed, so removed them. Currently only one clock will be added, so limit the clock maxItems to 1. Add a clock name to be able to differentiate and filter bogus entries. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220329150742.22093-4-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
84 lines
2.4 KiB
YAML
84 lines
2.4 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/rockchip,rk3399-cru.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Rockchip RK3399 Clock and Reset Unit
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maintainers:
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- Elaine Zhang <zhangqing@rock-chips.com>
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- Heiko Stuebner <heiko@sntech.de>
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description: |
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The RK3399 clock controller generates and supplies clock to various
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controllers within the SoC and also implements a reset controller for SoC
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peripherals.
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Each clock is assigned an identifier and client nodes can use this identifier
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to specify the clock which they consume. All available clocks are defined as
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preprocessor macros in the dt-bindings/clock/rk3399-cru.h headers and can be
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used in device tree sources. Similar macros exist for the reset sources in
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these files.
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There are several clocks that are generated outside the SoC. It is expected
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that they are defined using standard clock bindings with following
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clock-output-names:
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- "xin24m" - crystal input - required,
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- "xin32k" - rtc clock - optional,
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- "clkin_gmac" - external GMAC clock - optional,
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- "clkin_i2s" - external I2S clock - optional,
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- "pclkin_cif" - external ISP clock - optional,
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- "clk_usbphy0_480m" - output clock of the pll in the usbphy0
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- "clk_usbphy1_480m" - output clock of the pll in the usbphy1
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properties:
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compatible:
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enum:
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- rockchip,rk3399-pmucru
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- rockchip,rk3399-cru
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reg:
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maxItems: 1
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"#clock-cells":
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const: 1
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"#reset-cells":
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const: 1
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clocks:
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maxItems: 1
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clock-names:
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const: xin24m
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rockchip,grf:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Phandle to the syscon managing the "general register files". It is used
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for GRF muxes, if missing any muxes present in the GRF will not be
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available.
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required:
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- compatible
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- reg
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- "#clock-cells"
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- "#reset-cells"
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additionalProperties: false
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examples:
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- |
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pmucru: clock-controller@ff750000 {
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compatible = "rockchip,rk3399-pmucru";
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reg = <0xff750000 0x1000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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- |
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cru: clock-controller@ff760000 {
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compatible = "rockchip,rk3399-cru";
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reg = <0xff760000 0x1000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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