mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git/
synced 2026-04-17 22:23:45 -04:00
Disable the modesetting pipeline before release the radeon's fbdev
client. Fixes the following error:
[ 17.217408] WARNING: CPU: 5 PID: 1464 at drivers/gpu/drm/ttm/ttm_bo.c:326 ttm_bo_release+0x27e/0x2d0 [ttm]
[ 17.217418] Modules linked in: edac_mce_amd radeon(+) drm_ttm_helper ttm video drm_suballoc_helper drm_display_helper kvm irqbypass drm_kms_helper syscopyarea crc32_pclmul sysfillrect sha512_ssse3 sysimgblt sha512_generic cfbfillrect cfbimgblt wmi_bmof aesni_intel cfbcopyarea crypto_simd cryptd k10temp acpi_cpufreq wmi dm_mod
[ 17.217432] CPU: 5 PID: 1464 Comm: systemd-udevd Not tainted 6.4.0-rc4+ #1
[ 17.217436] Hardware name: Micro-Star International Co., Ltd. MS-7A38/B450M PRO-VDH MAX (MS-7A38), BIOS B.G0 07/26/2022
[ 17.217438] RIP: 0010:ttm_bo_release+0x27e/0x2d0 [ttm]
[ 17.217444] Code: 48 89 43 38 48 89 43 40 48 8b 5c 24 30 48 8b b5 40 08 00 00 48 8b 6c 24 38 48 83 c4 58 e9 7a 49 f7 e0 48 89 ef e9 6c fe ff ff <0f> 0b 48 83 7b 20 00 0f 84 b7 fd ff ff 0f 0b 0f 1f 00 e9 ad fd ff
[ 17.217448] RSP: 0018:ffffc9000095fbb0 EFLAGS: 00010202
[ 17.217451] RAX: 0000000000000001 RBX: ffff8881052c8de0 RCX: 0000000000000000
[ 17.217453] RDX: 0000000000000001 RSI: 0000000000000000 RDI: ffff8881052c8de0
[ 17.217455] RBP: ffff888104a66e00 R08: ffff8881052c8de0 R09: ffff888104a7cf08
[ 17.217457] R10: ffffc9000095fbe0 R11: ffffc9000095fbe8 R12: ffff8881052c8c78
[ 17.217458] R13: ffff8881052c8c78 R14: dead000000000100 R15: ffff88810528b108
[ 17.217460] FS: 00007f319fcbb8c0(0000) GS:ffff88881a540000(0000) knlGS:0000000000000000
[ 17.217463] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 17.217464] CR2: 000055dc8b0224a0 CR3: 000000010373d000 CR4: 0000000000750ee0
[ 17.217466] PKRU: 55555554
[ 17.217468] Call Trace:
[ 17.217470] <TASK>
[ 17.217472] ? __warn+0x97/0x160
[ 17.217476] ? ttm_bo_release+0x27e/0x2d0 [ttm]
[ 17.217481] ? report_bug+0x1ec/0x200
[ 17.217487] ? handle_bug+0x3c/0x70
[ 17.217490] ? exc_invalid_op+0x1f/0x90
[ 17.217493] ? preempt_count_sub+0xb5/0x100
[ 17.217496] ? asm_exc_invalid_op+0x16/0x20
[ 17.217500] ? ttm_bo_release+0x27e/0x2d0 [ttm]
[ 17.217505] ? ttm_resource_move_to_lru_tail+0x1ab/0x1d0 [ttm]
[ 17.217511] radeon_bo_unref+0x1a/0x30 [radeon]
[ 17.217547] radeon_gem_object_free+0x20/0x30 [radeon]
[ 17.217579] radeon_fbdev_fb_destroy+0x57/0x90 [radeon]
[ 17.217616] unregister_framebuffer+0x72/0x110
[ 17.217620] drm_client_dev_unregister+0x6d/0xe0
[ 17.217623] drm_dev_unregister+0x2e/0x90
[ 17.217626] drm_put_dev+0x26/0x90
[ 17.217628] pci_device_remove+0x44/0xc0
[ 17.217631] really_probe+0x257/0x340
[ 17.217635] __driver_probe_device+0x73/0x120
[ 17.217638] driver_probe_device+0x2c/0xb0
[ 17.217641] __driver_attach+0xa0/0x150
[ 17.217643] ? __pfx___driver_attach+0x10/0x10
[ 17.217646] bus_for_each_dev+0x67/0xa0
[ 17.217649] bus_add_driver+0x10e/0x210
[ 17.217651] driver_register+0x5c/0x120
[ 17.217653] ? __pfx_radeon_module_init+0x10/0x10 [radeon]
[ 17.217681] do_one_initcall+0x44/0x220
[ 17.217684] ? kmalloc_trace+0x37/0xc0
[ 17.217688] do_init_module+0x64/0x240
[ 17.217691] __do_sys_finit_module+0xb2/0x100
[ 17.217694] do_syscall_64+0x3b/0x90
[ 17.217697] entry_SYSCALL_64_after_hwframe+0x72/0xdc
[ 17.217700] RIP: 0033:0x7f319feaa5a9
[ 17.217702] Code: 08 89 e8 5b 5d c3 66 2e 0f 1f 84 00 00 00 00 00 90 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 27 08 0d 00 f7 d8 64 89 01 48
[ 17.217706] RSP: 002b:00007ffc6bf3e7f8 EFLAGS: 00000246 ORIG_RAX: 0000000000000139
[ 17.217709] RAX: ffffffffffffffda RBX: 00005607204f3170 RCX: 00007f319feaa5a9
[ 17.217710] RDX: 0000000000000000 RSI: 00007f31a002eefd RDI: 0000000000000018
[ 17.217712] RBP: 00007f31a002eefd R08: 0000000000000000 R09: 00005607204f1860
[ 17.217714] R10: 0000000000000018 R11: 0000000000000246 R12: 0000000000020000
[ 17.217716] R13: 0000000000000000 R14: 0000560720522450 R15: 0000560720255899
[ 17.217718] </TASK>
[ 17.217719] ---[ end trace 0000000000000000 ]---
The buffer object backing the fbdev emulation got pinned twice: by the
fb_probe helper radeon_fbdev_create_pinned_object() and the modesetting
code when the framebuffer got displayed. It only got unpinned once by
the fbdev helper radeon_fbdev_destroy_pinned_object(). Hence TTM's BO-
release function complains about the pin counter. Forcing the outputs
off also undoes the modesettings pin increment.
Tested-by: Borislav Petkov (AMD) <bp@alien8.de>
Reported-by: Borislav Petkov <bp@alien8.de>
Closes: https://lore.kernel.org/dri-devel/20230603174814.GCZHt83pN+wNjf63sC@fat_crate.local/
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Fixes: e317a69fe8 ("drm/radeon: Implement client-based fbdev emulation")
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Thomas Zimmermann <tzimmermann@suse.de>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
424 lines
11 KiB
C
424 lines
11 KiB
C
/*
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* Copyright © 2007 David Airlie
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* David Airlie
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*/
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#include <linux/pci.h>
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#include <linux/pm_runtime.h>
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#include <linux/vga_switcheroo.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_fb_helper.h>
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#include <drm/drm_fourcc.h>
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#include <drm/drm_framebuffer.h>
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#include <drm/drm_gem_framebuffer_helper.h>
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#include "radeon.h"
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static void radeon_fbdev_destroy_pinned_object(struct drm_gem_object *gobj)
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{
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struct radeon_bo *rbo = gem_to_radeon_bo(gobj);
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int ret;
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ret = radeon_bo_reserve(rbo, false);
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if (likely(ret == 0)) {
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radeon_bo_kunmap(rbo);
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radeon_bo_unpin(rbo);
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radeon_bo_unreserve(rbo);
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}
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drm_gem_object_put(gobj);
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}
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static int radeon_fbdev_create_pinned_object(struct drm_fb_helper *fb_helper,
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struct drm_mode_fb_cmd2 *mode_cmd,
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struct drm_gem_object **gobj_p)
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{
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const struct drm_format_info *info;
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struct radeon_device *rdev = fb_helper->dev->dev_private;
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struct drm_gem_object *gobj = NULL;
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struct radeon_bo *rbo = NULL;
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bool fb_tiled = false; /* useful for testing */
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u32 tiling_flags = 0;
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int ret;
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int aligned_size, size;
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int height = mode_cmd->height;
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u32 cpp;
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info = drm_get_format_info(rdev->ddev, mode_cmd);
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cpp = info->cpp[0];
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/* need to align pitch with crtc limits */
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mode_cmd->pitches[0] = radeon_align_pitch(rdev, mode_cmd->width, cpp,
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fb_tiled);
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if (rdev->family >= CHIP_R600)
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height = ALIGN(mode_cmd->height, 8);
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size = mode_cmd->pitches[0] * height;
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aligned_size = ALIGN(size, PAGE_SIZE);
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ret = radeon_gem_object_create(rdev, aligned_size, 0,
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RADEON_GEM_DOMAIN_VRAM,
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0, true, &gobj);
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if (ret) {
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pr_err("failed to allocate framebuffer (%d)\n", aligned_size);
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return -ENOMEM;
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}
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rbo = gem_to_radeon_bo(gobj);
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if (fb_tiled)
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tiling_flags = RADEON_TILING_MACRO;
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#ifdef __BIG_ENDIAN
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switch (cpp) {
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case 4:
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tiling_flags |= RADEON_TILING_SWAP_32BIT;
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break;
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case 2:
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tiling_flags |= RADEON_TILING_SWAP_16BIT;
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break;
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default:
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break;
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}
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#endif
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if (tiling_flags) {
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ret = radeon_bo_set_tiling_flags(rbo,
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tiling_flags | RADEON_TILING_SURFACE,
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mode_cmd->pitches[0]);
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if (ret)
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dev_err(rdev->dev, "FB failed to set tiling flags\n");
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}
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ret = radeon_bo_reserve(rbo, false);
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if (unlikely(ret != 0))
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goto err_radeon_fbdev_destroy_pinned_object;
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/* Only 27 bit offset for legacy CRTC */
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ret = radeon_bo_pin_restricted(rbo, RADEON_GEM_DOMAIN_VRAM,
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ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27,
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NULL);
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if (ret) {
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radeon_bo_unreserve(rbo);
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goto err_radeon_fbdev_destroy_pinned_object;
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}
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if (fb_tiled)
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radeon_bo_check_tiling(rbo, 0, 0);
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ret = radeon_bo_kmap(rbo, NULL);
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radeon_bo_unreserve(rbo);
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if (ret)
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goto err_radeon_fbdev_destroy_pinned_object;
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*gobj_p = gobj;
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return 0;
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err_radeon_fbdev_destroy_pinned_object:
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radeon_fbdev_destroy_pinned_object(gobj);
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*gobj_p = NULL;
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return ret;
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}
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/*
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* Fbdev ops and struct fb_ops
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*/
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static int radeon_fbdev_fb_open(struct fb_info *info, int user)
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{
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struct drm_fb_helper *fb_helper = info->par;
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struct radeon_device *rdev = fb_helper->dev->dev_private;
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int ret;
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ret = pm_runtime_get_sync(rdev->ddev->dev);
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if (ret < 0 && ret != -EACCES)
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goto err_pm_runtime_mark_last_busy;
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return 0;
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err_pm_runtime_mark_last_busy:
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pm_runtime_mark_last_busy(rdev->ddev->dev);
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pm_runtime_put_autosuspend(rdev->ddev->dev);
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return ret;
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}
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static int radeon_fbdev_fb_release(struct fb_info *info, int user)
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{
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struct drm_fb_helper *fb_helper = info->par;
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struct radeon_device *rdev = fb_helper->dev->dev_private;
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pm_runtime_mark_last_busy(rdev->ddev->dev);
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pm_runtime_put_autosuspend(rdev->ddev->dev);
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return 0;
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}
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static void radeon_fbdev_fb_destroy(struct fb_info *info)
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{
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struct drm_fb_helper *fb_helper = info->par;
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struct drm_framebuffer *fb = fb_helper->fb;
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struct drm_gem_object *gobj = drm_gem_fb_get_obj(fb, 0);
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drm_fb_helper_fini(fb_helper);
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drm_framebuffer_unregister_private(fb);
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drm_framebuffer_cleanup(fb);
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kfree(fb);
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radeon_fbdev_destroy_pinned_object(gobj);
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drm_client_release(&fb_helper->client);
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drm_fb_helper_unprepare(fb_helper);
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kfree(fb_helper);
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}
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static const struct fb_ops radeon_fbdev_fb_ops = {
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.owner = THIS_MODULE,
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DRM_FB_HELPER_DEFAULT_OPS,
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.fb_open = radeon_fbdev_fb_open,
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.fb_release = radeon_fbdev_fb_release,
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.fb_read = drm_fb_helper_cfb_read,
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.fb_write = drm_fb_helper_cfb_write,
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.fb_fillrect = drm_fb_helper_cfb_fillrect,
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.fb_copyarea = drm_fb_helper_cfb_copyarea,
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.fb_imageblit = drm_fb_helper_cfb_imageblit,
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.fb_destroy = radeon_fbdev_fb_destroy,
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};
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/*
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* Fbdev helpers and struct drm_fb_helper_funcs
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*/
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static int radeon_fbdev_fb_helper_fb_probe(struct drm_fb_helper *fb_helper,
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struct drm_fb_helper_surface_size *sizes)
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{
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struct radeon_device *rdev = fb_helper->dev->dev_private;
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struct drm_mode_fb_cmd2 mode_cmd = { };
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struct fb_info *info;
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struct drm_gem_object *gobj;
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struct radeon_bo *rbo;
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struct drm_framebuffer *fb;
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int ret;
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unsigned long tmp;
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mode_cmd.width = sizes->surface_width;
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mode_cmd.height = sizes->surface_height;
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/* avivo can't scanout real 24bpp */
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if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev))
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sizes->surface_bpp = 32;
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mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
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sizes->surface_depth);
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ret = radeon_fbdev_create_pinned_object(fb_helper, &mode_cmd, &gobj);
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if (ret) {
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DRM_ERROR("failed to create fbcon object %d\n", ret);
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return ret;
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}
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rbo = gem_to_radeon_bo(gobj);
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fb = kzalloc(sizeof(*fb), GFP_KERNEL);
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if (!fb) {
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ret = -ENOMEM;
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goto err_radeon_fbdev_destroy_pinned_object;
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}
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ret = radeon_framebuffer_init(rdev->ddev, fb, &mode_cmd, gobj);
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if (ret) {
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DRM_ERROR("failed to initialize framebuffer %d\n", ret);
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goto err_kfree;
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}
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/* setup helper */
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fb_helper->fb = fb;
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/* okay we have an object now allocate the framebuffer */
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info = drm_fb_helper_alloc_info(fb_helper);
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if (IS_ERR(info)) {
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ret = PTR_ERR(info);
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goto err_drm_framebuffer_unregister_private;
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}
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info->fbops = &radeon_fbdev_fb_ops;
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info->flags = FBINFO_DEFAULT;
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/* radeon resume is fragile and needs a vt switch to help it along */
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info->skip_vt_switch = false;
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drm_fb_helper_fill_info(info, fb_helper, sizes);
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tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start;
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info->fix.smem_start = rdev->mc.aper_base + tmp;
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info->fix.smem_len = radeon_bo_size(rbo);
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info->screen_base = (__force void __iomem *)rbo->kptr;
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info->screen_size = radeon_bo_size(rbo);
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memset_io(info->screen_base, 0, info->screen_size);
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/* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */
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DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start);
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DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base);
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DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo));
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DRM_INFO("fb depth is %d\n", fb->format->depth);
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DRM_INFO(" pitch is %d\n", fb->pitches[0]);
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return 0;
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err_drm_framebuffer_unregister_private:
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fb_helper->fb = NULL;
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drm_framebuffer_unregister_private(fb);
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drm_framebuffer_cleanup(fb);
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err_kfree:
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kfree(fb);
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err_radeon_fbdev_destroy_pinned_object:
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radeon_fbdev_destroy_pinned_object(gobj);
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return ret;
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}
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static const struct drm_fb_helper_funcs radeon_fbdev_fb_helper_funcs = {
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.fb_probe = radeon_fbdev_fb_helper_fb_probe,
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};
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/*
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* Fbdev client and struct drm_client_funcs
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*/
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static void radeon_fbdev_client_unregister(struct drm_client_dev *client)
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{
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struct drm_fb_helper *fb_helper = drm_fb_helper_from_client(client);
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struct drm_device *dev = fb_helper->dev;
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struct radeon_device *rdev = dev->dev_private;
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if (fb_helper->info) {
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vga_switcheroo_client_fb_set(rdev->pdev, NULL);
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drm_helper_force_disable_all(dev);
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drm_fb_helper_unregister_info(fb_helper);
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} else {
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drm_client_release(&fb_helper->client);
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drm_fb_helper_unprepare(fb_helper);
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kfree(fb_helper);
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}
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}
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static int radeon_fbdev_client_restore(struct drm_client_dev *client)
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{
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drm_fb_helper_lastclose(client->dev);
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vga_switcheroo_process_delayed_switch();
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return 0;
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}
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static int radeon_fbdev_client_hotplug(struct drm_client_dev *client)
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{
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struct drm_fb_helper *fb_helper = drm_fb_helper_from_client(client);
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struct drm_device *dev = client->dev;
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struct radeon_device *rdev = dev->dev_private;
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int ret;
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if (dev->fb_helper)
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return drm_fb_helper_hotplug_event(dev->fb_helper);
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ret = drm_fb_helper_init(dev, fb_helper);
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if (ret)
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goto err_drm_err;
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if (!drm_drv_uses_atomic_modeset(dev))
|
|
drm_helper_disable_unused_functions(dev);
|
|
|
|
ret = drm_fb_helper_initial_config(fb_helper);
|
|
if (ret)
|
|
goto err_drm_fb_helper_fini;
|
|
|
|
vga_switcheroo_client_fb_set(rdev->pdev, fb_helper->info);
|
|
|
|
return 0;
|
|
|
|
err_drm_fb_helper_fini:
|
|
drm_fb_helper_fini(fb_helper);
|
|
err_drm_err:
|
|
drm_err(dev, "Failed to setup radeon fbdev emulation (ret=%d)\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
static const struct drm_client_funcs radeon_fbdev_client_funcs = {
|
|
.owner = THIS_MODULE,
|
|
.unregister = radeon_fbdev_client_unregister,
|
|
.restore = radeon_fbdev_client_restore,
|
|
.hotplug = radeon_fbdev_client_hotplug,
|
|
};
|
|
|
|
void radeon_fbdev_setup(struct radeon_device *rdev)
|
|
{
|
|
struct drm_fb_helper *fb_helper;
|
|
int bpp_sel = 32;
|
|
int ret;
|
|
|
|
if (rdev->mc.real_vram_size <= (8 * 1024 * 1024))
|
|
bpp_sel = 8;
|
|
else if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32 * 1024 * 1024))
|
|
bpp_sel = 16;
|
|
|
|
fb_helper = kzalloc(sizeof(*fb_helper), GFP_KERNEL);
|
|
if (!fb_helper)
|
|
return;
|
|
drm_fb_helper_prepare(rdev->ddev, fb_helper, bpp_sel, &radeon_fbdev_fb_helper_funcs);
|
|
|
|
ret = drm_client_init(rdev->ddev, &fb_helper->client, "radeon-fbdev",
|
|
&radeon_fbdev_client_funcs);
|
|
if (ret) {
|
|
drm_err(rdev->ddev, "Failed to register client: %d\n", ret);
|
|
goto err_drm_client_init;
|
|
}
|
|
|
|
ret = radeon_fbdev_client_hotplug(&fb_helper->client);
|
|
if (ret)
|
|
drm_dbg_kms(rdev->ddev, "client hotplug ret=%d\n", ret);
|
|
|
|
drm_client_register(&fb_helper->client);
|
|
|
|
return;
|
|
|
|
err_drm_client_init:
|
|
drm_fb_helper_unprepare(fb_helper);
|
|
kfree(fb_helper);
|
|
}
|
|
|
|
void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state)
|
|
{
|
|
if (rdev->ddev->fb_helper)
|
|
drm_fb_helper_set_suspend(rdev->ddev->fb_helper, state);
|
|
}
|
|
|
|
bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj)
|
|
{
|
|
struct drm_fb_helper *fb_helper = rdev->ddev->fb_helper;
|
|
struct drm_gem_object *gobj;
|
|
|
|
if (!fb_helper)
|
|
return false;
|
|
|
|
gobj = drm_gem_fb_get_obj(fb_helper->fb, 0);
|
|
if (!gobj)
|
|
return false;
|
|
if (gobj != &robj->tbo.base)
|
|
return false;
|
|
|
|
return true;
|
|
}
|