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7a4756b2fd
Like done for post-context-restore commands, allow to add commands from configfs in the middle of context restore. Since currently the indirect ctx hardcodes the offset to CTX_INDIRECT_CTX_OFFSET_DEFAULT, this is executed in the very beginning of engine context restore. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/20250916-wa-bb-cmds-v5-6-306bddbc15da@intel.com Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
40 lines
1.5 KiB
C
40 lines
1.5 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2025 Intel Corporation
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*/
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#ifndef _XE_CONFIGFS_H_
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#define _XE_CONFIGFS_H_
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#include <linux/limits.h>
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#include <linux/types.h>
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#include <xe_hw_engine_types.h>
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struct pci_dev;
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#if IS_ENABLED(CONFIG_CONFIGFS_FS)
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int xe_configfs_init(void);
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void xe_configfs_exit(void);
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void xe_configfs_check_device(struct pci_dev *pdev);
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bool xe_configfs_get_survivability_mode(struct pci_dev *pdev);
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u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
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bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
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u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev, enum xe_engine_class,
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const u32 **cs);
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u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
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const u32 **cs);
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#else
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static inline int xe_configfs_init(void) { return 0; }
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static inline void xe_configfs_exit(void) { }
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static inline void xe_configfs_check_device(struct pci_dev *pdev) { }
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static inline bool xe_configfs_get_survivability_mode(struct pci_dev *pdev) { return false; }
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static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
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static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; }
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static inline u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev, enum xe_engine_class,
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const u32 **cs) { return 0; }
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static inline u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
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const u32 **cs) { return 0; }
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#endif
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#endif
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