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iova_to_phys is a performance path for the DMA API and iommufd, implement it using an unrolled get_user_pages() like function waterfall scheme. The implementation itself is fairly trivial. Reviewed-by: Kevin Tian <kevin.tian@intel.com> Reviewed-by: Pasha Tatashin <pasha.tatashin@soleen.com> Reviewed-by: Samiullah Khawaja <skhawaja@google.com> Tested-by: Alejandro Jimenez <alejandro.j.jimenez@oracle.com> Tested-by: Pasha Tatashin <pasha.tatashin@soleen.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
172 lines
4.7 KiB
C
172 lines
4.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2024-2025, NVIDIA CORPORATION & AFFILIATES
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*/
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#ifndef __GENERIC_PT_IOMMU_H
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#define __GENERIC_PT_IOMMU_H
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#include <linux/generic_pt/common.h>
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#include <linux/iommu.h>
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#include <linux/mm_types.h>
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struct pt_iommu_ops;
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/**
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* DOC: IOMMU Radix Page Table
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*
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* The IOMMU implementation of the Generic Page Table provides an ops struct
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* that is useful to go with an iommu_domain to serve the DMA API, IOMMUFD and
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* the generic map/unmap interface.
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*
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* This interface uses a caller provided locking approach. The caller must have
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* a VA range lock concept that prevents concurrent threads from calling ops on
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* the same VA. Generally the range lock must be at least as large as a single
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* map call.
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*/
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/**
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* struct pt_iommu - Base structure for IOMMU page tables
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*
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* The format-specific struct will include this as the first member.
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*/
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struct pt_iommu {
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/**
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* @domain: The core IOMMU domain. The driver should use a union to
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* overlay this memory with its previously existing domain struct to
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* create an alias.
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*/
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struct iommu_domain domain;
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/**
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* @ops: Function pointers to access the API
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*/
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const struct pt_iommu_ops *ops;
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/**
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* @nid: Node ID to use for table memory allocations. The IOMMU driver
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* may want to set the NID to the device's NID, if there are multiple
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* table walkers.
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*/
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int nid;
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};
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/**
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* struct pt_iommu_info - Details about the IOMMU page table
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*
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* Returned from pt_iommu_ops->get_info()
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*/
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struct pt_iommu_info {
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/**
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* @pgsize_bitmap: A bitmask where each set bit indicates
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* a page size that can be natively stored in the page table.
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*/
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u64 pgsize_bitmap;
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};
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struct pt_iommu_ops {
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/**
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* @get_info: Return the pt_iommu_info structure
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* @iommu_table: Table to query
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*
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* Return some basic static information about the page table.
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*/
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void (*get_info)(struct pt_iommu *iommu_table,
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struct pt_iommu_info *info);
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/**
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* @deinit: Undo a format specific init operation
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* @iommu_table: Table to destroy
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*
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* Release all of the memory. The caller must have already removed the
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* table from all HW access and all caches.
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*/
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void (*deinit)(struct pt_iommu *iommu_table);
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};
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static inline void pt_iommu_deinit(struct pt_iommu *iommu_table)
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{
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/*
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* It is safe to call pt_iommu_deinit() before an init, or if init
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* fails. The ops pointer will only become non-NULL if deinit needs to be
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* run.
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*/
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if (iommu_table->ops)
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iommu_table->ops->deinit(iommu_table);
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}
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/**
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* struct pt_iommu_cfg - Common configuration values for all formats
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*/
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struct pt_iommu_cfg {
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/**
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* @features: Features required. Only these features will be turned on.
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* The feature list should reflect what the IOMMU HW is capable of.
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*/
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unsigned int features;
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/**
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* @hw_max_vasz_lg2: Maximum VA the IOMMU HW can support. This will
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* imply the top level of the table.
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*/
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u8 hw_max_vasz_lg2;
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/**
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* @hw_max_oasz_lg2: Maximum OA the IOMMU HW can support. The format
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* might select a lower maximum OA.
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*/
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u8 hw_max_oasz_lg2;
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};
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/* Generate the exported function signatures from iommu_pt.h */
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#define IOMMU_PROTOTYPES(fmt) \
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phys_addr_t pt_iommu_##fmt##_iova_to_phys(struct iommu_domain *domain, \
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dma_addr_t iova); \
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int pt_iommu_##fmt##_init(struct pt_iommu_##fmt *table, \
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const struct pt_iommu_##fmt##_cfg *cfg, \
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gfp_t gfp); \
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void pt_iommu_##fmt##_hw_info(struct pt_iommu_##fmt *table, \
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struct pt_iommu_##fmt##_hw_info *info)
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#define IOMMU_FORMAT(fmt, member) \
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struct pt_iommu_##fmt { \
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struct pt_iommu iommu; \
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struct pt_##fmt member; \
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}; \
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IOMMU_PROTOTYPES(fmt)
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/*
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* A driver uses IOMMU_PT_DOMAIN_OPS to populate the iommu_domain_ops for the
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* iommu_pt
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*/
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#define IOMMU_PT_DOMAIN_OPS(fmt) \
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.iova_to_phys = &pt_iommu_##fmt##_iova_to_phys,
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/*
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* The driver should setup its domain struct like
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* union {
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* struct iommu_domain domain;
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* struct pt_iommu_xxx xx;
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* };
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* PT_IOMMU_CHECK_DOMAIN(struct mock_iommu_domain, xx.iommu, domain);
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*
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* Which creates an alias between driver_domain.domain and
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* driver_domain.xx.iommu.domain. This is to avoid a mass rename of existing
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* driver_domain.domain users.
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*/
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#define PT_IOMMU_CHECK_DOMAIN(s, pt_iommu_memb, domain_memb) \
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static_assert(offsetof(s, pt_iommu_memb.domain) == \
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offsetof(s, domain_memb))
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struct pt_iommu_amdv1_cfg {
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struct pt_iommu_cfg common;
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unsigned int starting_level;
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};
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struct pt_iommu_amdv1_hw_info {
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u64 host_pt_root;
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u8 mode;
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};
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IOMMU_FORMAT(amdv1, amdpt);
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#undef IOMMU_PROTOTYPES
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#undef IOMMU_FORMAT
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#endif
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