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13e7b3305b
The Renesas RZ/T2H (R9A09G077) and Renesas RZ/N2H (R9A09G087) SoCs have an Interrupt Controller (ICU) that supports interrupts from external pins IRQ0 to IRQ15, and SEI, and software-triggered interrupts INTCPU0 to INTCPU15. INTCPU0 to INTCPU13, IRQ0 to IRQ13 are non-safety interrupts, while INTCPU14, INTCPU15, IRQ14, IRQ15 and SEI are safety interrupts, and are exposed via a separate register space. Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://patch.msgid.link/20251201112933.488801-3-cosmin-gabriel.tanislav.xa@renesas.com
24 lines
640 B
C
24 lines
640 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Renesas RZ/T2H Interrupt Control Unit (ICU)
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*
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* Copyright (C) 2025 Renesas Electronics Corporation.
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*/
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#ifndef __LINUX_IRQ_RENESAS_RZT2H
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#define __LINUX_IRQ_RENESAS_RZT2H
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#include <linux/platform_device.h>
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#define RZT2H_ICU_DMAC_REQ_NO_DEFAULT 0x3ff
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#ifdef CONFIG_RENESAS_RZT2H_ICU
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void rzt2h_icu_register_dma_req(struct platform_device *icu_dev, u8 dmac_index, u8 dmac_channel,
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u16 req_no);
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#else
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static inline void rzt2h_icu_register_dma_req(struct platform_device *icu_dev, u8 dmac_index,
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u8 dmac_channel, u16 req_no) { }
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#endif
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#endif /* __LINUX_IRQ_RENESAS_RZT2H */
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