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74ff703658
pic64gx mailbox is compatible with mpfs mailbox, even if the mailbox consumer is not - the underlying communication mechanism is the same. Signed-off-by: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
62 lines
1.4 KiB
YAML
62 lines
1.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mailbox/microchip,mpfs-mailbox.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) mailbox controller
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maintainers:
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- Conor Dooley <conor.dooley@microchip.com>
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properties:
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compatible:
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oneOf:
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- items:
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- const: microchip,pic64gx-mailbox
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- const: microchip,mpfs-mailbox
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- const: microchip,mpfs-mailbox
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reg:
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oneOf:
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- items:
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- description: mailbox data registers
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- items:
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- description: mailbox control & data registers
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- description: mailbox interrupt registers
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deprecated: true
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- items:
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- description: mailbox control registers
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- description: mailbox interrupt registers
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- description: mailbox data registers
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deprecated: true
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interrupts:
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maxItems: 1
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"#mbox-cells":
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const: 1
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required:
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- compatible
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- reg
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- interrupts
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- "#mbox-cells"
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additionalProperties: false
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examples:
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- |
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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mailbox@37020800 {
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compatible = "microchip,mpfs-mailbox";
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reg = <0x37020800 0x100>;
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interrupt-parent = <&L1>;
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interrupts = <96>;
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#mbox-cells = <1>;
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};
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};
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