mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git/
synced 2026-04-18 06:33:43 -04:00
Pull clk updates from Stephen Boyd:
"We have some late breaking reports that a patch series to rework clk
rate range support broke boot on some devices, so I've left that
branch out of this. Hopefully we can get to that next week, or punt on
it and let it bake another cycle. That means we don't really have any
changes to the core framework this time around besides a few typo
fixes. Instead this is all clk driver updates and fixes.
The usual suspects are here (again), with Qualcomm dominating the
diffstat. We look to have gained support for quite a few new Qualcomm
SoCs and Dmitry worked on updating many of the existing Qualcomm
drivers to use clk_parent_data. After that we have MediaTek drivers
getting some much needed updates, in particular to support GPU DVFS.
There are also quite a few Samsung clk driver patches, but that's
mostly because there was a maintainer change and so last release we
missed some of those patches.
Overall things look normal, but I'm slowly reviewing core framework
code nowadays and that shows given the rate range patches had to be
yanked last minute. Let's hope this situation changes soon.
New Drivers:
- Support for Renesas VersaClock7 clock generator family
- Add Spreadtrum UMS512 SoC clk support
- New clock drivers for MediaTek Helio X10 MT6795
- Display clks for Qualcomm SM6115, SM8450
- GPU clks for Qualcomm SC8280XP
- Qualcomm MSM8909 and SM6375 global and SMD RPM clk drivers
Deleted Drivers:
- Remove DaVinci DM644x and DM646x clk driver support
Updates:
- Convert Baikal-T1 CCU driver to platform driver
- Split reset support out of primary Baikal-T1 CCU driver
- Add some missing clks required for RPiVid Video Decoder on
RaspberryPi
- Mark PLLC critical on bcm2835
- More devm helpers for fixed rate registration
- Various PXA168 clk driver fixes
- Add resets for MediaTek MT8195 PCIe and USB
- Miscellaneous of_node_put() fixes
- Nuke dt-bindings/clk path (again) by moving headers to
dt-bindings/clock
- Convert gpio-clk-gate binding to YAML
- Various fixes to AMD/Xilinx Zynqmp clk driver
- Graduate AMD/Xilinx "clocking wizard" driver from staging
- Add missing DPI1_HDMI clock in MT8195 VDOSYS1
- Clock driver changes to support GPU DVFS on MT8183, MT8192, MT8195
- Fix GPU clock topology on MT8195
- Propogate rate changes from GPU clock gate up the tree
- Clock mux notifiers for GPU-related PLLs
- Conversion of more "simple" drivers to mtk_clk_simple_probe()
- Hook up mtk_clk_simple_remove() for "simple" MT8192 clock drivers
- Fixes to previous |struct clk| to |struct clk_hw| conversion on
MediaTek
- Shrink MT8192 clock driver by deduplicating clock parent lists
- Change order between 'sim_enet_root_clk' and 'enet_qos_root_clk'
clocks for i.MX8MP
- Drop unnecessary newline in i.MX8MM dt-bindings
- Add more MU1 and SAI clocks dt-bindings Ids
- Introduce slice busy bit check for i.MX93 composite clock
- Introduce white list bit check for i.MX93 composite clock
- Add new i.MX93 clock gate
- Add MU1 and MU2 clocks to i.MX93 clock provider
- Add SAI IPG clocks to i.MX93 clock provider
- add generic clocks for U(S)ART available on SAMA5D2 SoCs
- reset controller support for Polarfire clocks
- .round_rate and .set rate support for clk-mpfs
- code cleanup for clk-mpfs
- PLL support for PolarFire SoC's Clock Conditioning Circuitry
- Add watchdog, I2C, pin control/GPIO, and Ethernet clocks on R-Car
V4H
- Add SDHI, Timer (CMT/TMU), and SPI (MSIOF) clocks on R-Car S4-8
- Add I2C clocks and resets on RZ/V2M
- Document clock support for the RZ/Five SoC
- mux-variant clock using the table variant to select parents
- clock controller for the rv1126 soc
- conversion of rk3128 to yaml and relicensing of the yaml bindings
to gpl2+MIT (following dt-binding guildelines)
- Exynos7885: add FSYS, TREX and MFC clock controllers
- Exynos850: add IS and AUD (audio) clock controllers with bindings
- ExynosAutov9: add FSYS clock controllers with bindings
- ExynosAutov9: correct clock IDs in bindings of Peric 0 and 1 clock
controllers, due to duplicated entries. This is an acceptable ABI
break: recently developed/added platform so without legacies, acked
by known users/developers
- ExynosAutov9: add few missing Peric 0/1 gates
- ExynosAutov9: correct register offsets of few Peric 0/1 clocks
- Minor code improvements (use of_device_get_match_data() helper,
code style)
- Add Krzysztof Kozlowski as co-maintainer of Samsung SoC clocks, as
he already maintainers that architecture/platform
- Keep Qualcomm GDSCs enabled when PWRSTS_RET flag is there, solving
retention issues during suspend of USB on Qualcomm sc7180/sc7280
and SC8280XP
- Qualcomm SM6115 and QCM2260 are moved to reuse PLL configuration
- Qualcomm SDM660 SDCC1 moved to floor clk ops
- Support for the APCS PLLs for Qualcomm IPQ8064, IPQ8074 and IPQ6018
was added/fixed
- The Qualcomm MSM8996 CPU clocks are updated with support for ACD
- Support for Qualcomm SDM670 GCC and RPMh clks was added
- Transition to parent_data, parent_hws and use of ARRAY_SIZE() for
num_parents was done for many Qualcomm SoCs
- Support for per-reset defined delay on Qualcomm was introduced"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (283 commits)
clk: qcom: gcc-sm6375: Ensure unsigned long type
clk: qcom: gcc-sm6375: Remove unused variables
clk: qcom: kpss-xcc: convert to parent data API
clk: introduce (devm_)hw_register_mux_parent_data_table API
clk: allow building lan966x as a module
clk: clk-xgene: simplify if-if to if-else
clk: ast2600: BCLK comes from EPLL
clk: clocking-wizard: Depend on HAS_IOMEM
clk: clocking-wizard: Use dev_err_probe() helper
clk: nxp: fix typo in comment
clk: pxa: add a check for the return value of kzalloc()
clk: vc5: Add support for IDT/Renesas VersaClock 5P49V6975
dt-bindings: clock: vc5: Add 5P49V6975
clk: mvebu: armada-37xx-tbg: Remove the unneeded result variable
clk: ti: dra7-atl: Fix reference leak in of_dra7_atl_clk_probe
clk: Renesas versaclock7 ccf device driver
dt-bindings: Renesas versaclock7 device tree bindings
clk: ti: Balance of_node_get() calls for of_find_node_by_name()
clk: imx: scu: fix memleak on platform_device_add() fails
clk: vc5: Use regmap_{set,clear}_bits() where appropriate
...
366 lines
9.3 KiB
YAML
366 lines
9.3 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mfd/cirrus,lochnagar.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Cirrus Logic Lochnagar Audio Development Board
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maintainers:
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- patches@opensource.cirrus.com
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description: |
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Lochnagar is an evaluation and development board for Cirrus Logic
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Smart CODEC and Amp devices. It allows the connection of most Cirrus
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Logic devices on mini-cards, as well as allowing connection of
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various application processor systems to provide a full evaluation
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platform. Audio system topology, clocking and power can all be
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controlled through the Lochnagar, allowing the device under test
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to be used in a variety of possible use cases.
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Also see these documents for generic binding information:
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[1] GPIO : ../gpio/gpio.txt
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And these for relevant defines:
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[2] include/dt-bindings/pinctrl/lochnagar.h
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[3] include/dt-bindings/clock/lochnagar.h
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And these documents for the required sub-node binding details:
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[4] Clock: ../clock/cirrus,lochnagar.yaml
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[5] Pinctrl: ../pinctrl/cirrus,lochnagar.yaml
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[6] Sound: ../sound/cirrus,lochnagar.yaml
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[7] Hardware Monitor: ../hwmon/cirrus,lochnagar.yaml
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allOf:
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- if:
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properties:
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compatible:
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enum:
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- cirrus,lochnagar2
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then:
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properties:
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lochnagar-hwmon:
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type: object
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$ref: /schemas/hwmon/cirrus,lochnagar.yaml#
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lochnagar-sc:
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type: object
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$ref: /schemas/sound/cirrus,lochnagar.yaml#
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properties:
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compatible:
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enum:
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- cirrus,lochnagar1
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- cirrus,lochnagar2
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reg:
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const: 0x22
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reset-gpios:
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maxItems: 1
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present-gpios:
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description: |
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Host present line, indicating the presence of a
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host system, see [1]. This can be omitted if the present line is
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tied in hardware.
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maxItems: 1
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lochnagar-clk:
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type: object
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$ref: /schemas/clock/cirrus,lochnagar.yaml#
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lochnagar-pmic32k:
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type: object
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$ref: /schemas/clock/fixed-clock.yaml#
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properties:
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clock-frequency:
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const: 32768
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lochnagar-clk12m:
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type: object
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$ref: /schemas/clock/fixed-clock.yaml#
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properties:
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clock-frequency:
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const: 12288000
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lochnagar-clk11m:
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type: object
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$ref: /schemas/clock/fixed-clock.yaml#
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properties:
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clock-frequency:
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const: 11298600
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lochnagar-clk24m:
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type: object
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$ref: /schemas/clock/fixed-clock.yaml#
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properties:
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clock-frequency:
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const: 24576000
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lochnagar-clk22m:
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type: object
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$ref: /schemas/clock/fixed-clock.yaml#
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properties:
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clock-frequency:
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const: 22579200
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lochnagar-clk8m:
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type: object
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$ref: /schemas/clock/fixed-clock.yaml#
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properties:
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clock-frequency:
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const: 8192000
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lochnagar-usb24m:
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type: object
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$ref: /schemas/clock/fixed-clock.yaml#
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properties:
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clock-frequency:
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const: 24576000
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lochnagar-usb12m:
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type: object
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$ref: /schemas/clock/fixed-clock.yaml#
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properties:
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clock-frequency:
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const: 12288000
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pinctrl:
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type: object
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$ref: /schemas/pinctrl/cirrus,lochnagar.yaml#
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lochnagar-hwmon:
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type: object
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$ref: /schemas/hwmon/cirrus,lochnagar.yaml#
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lochnagar-sc:
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type: object
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$ref: /schemas/sound/cirrus,lochnagar.yaml#
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VDDCORE:
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description:
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Initialisation data for the VDDCORE regulator, which supplies the
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CODECs digital core if not being provided by an internal regulator.
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type: object
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$ref: /schemas/regulator/regulator.yaml#
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unevaluatedProperties: false
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properties:
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compatible:
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enum:
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- cirrus,lochnagar2-vddcore
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SYSVDD-supply:
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description:
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Primary power supply for the Lochnagar.
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required:
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- compatible
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MICVDD:
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description:
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Initialisation data for the MICVDD regulator, which supplies the
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CODECs MICVDD.
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type: object
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$ref: /schemas/regulator/regulator.yaml#
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unevaluatedProperties: false
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properties:
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compatible:
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enum:
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- cirrus,lochnagar2-micvdd
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SYSVDD-supply:
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description:
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Primary power supply for the Lochnagar.
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required:
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- compatible
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MIC1VDD:
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description:
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Initialisation data for the MIC1VDD supplies.
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type: object
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$ref: /schemas/regulator/regulator.yaml#
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unevaluatedProperties: false
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properties:
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compatible:
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enum:
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- cirrus,lochnagar2-mic1vdd
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cirrus,micbias-input:
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description:
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A property selecting which of the CODEC minicard micbias outputs
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should be used.
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 1
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maximum: 4
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MICBIAS1-supply:
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description:
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Regulator supplies for the MIC1VDD outputs, supplying the digital
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microphones, normally supplied from the attached CODEC.
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required:
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- compatible
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MIC2VDD:
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description:
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Initialisation data for the MIC2VDD supplies.
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type: object
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$ref: /schemas/regulator/regulator.yaml#
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unevaluatedProperties: false
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properties:
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compatible:
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enum:
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- cirrus,lochnagar2-mic2vdd
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cirrus,micbias-input:
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description:
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A property selecting which of the CODEC minicard micbias outputs
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should be used.
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 1
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maximum: 4
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MICBIAS2-supply:
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description:
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Regulator supplies for the MIC2VDD outputs, supplying the digital
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microphones, normally supplied from the attached CODEC.
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required:
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- compatible
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VDD1V8:
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description:
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Recommended fixed regulator for the VDD1V8 regulator, which supplies
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the CODECs analog and 1.8V digital supplies.
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type: object
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$ref: /schemas/regulator/regulator.yaml#
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unevaluatedProperties: false
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properties:
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compatible:
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enum:
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- regulator-fixed
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regulator-min-microvolt:
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const: 1800000
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regulator-max-microvolt:
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const: 1800000
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vin-supply:
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description:
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Should be set to same supply as SYSVDD
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required:
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- compatible
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- regulator-min-microvolt
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- regulator-max-microvolt
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- regulator-boot-on
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- regulator-always-on
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- vin-supply
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required:
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- compatible
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- reg
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- reset-gpios
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- lochnagar-clk
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- pinctrl
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/lochnagar.h>
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#include <dt-bindings/pinctrl/lochnagar.h>
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i2c@e0004000 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xe0004000 0x1000>;
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lochnagar: lochnagar@22 {
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compatible = "cirrus,lochnagar2";
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reg = <0x22>;
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reset-gpios = <&gpio0 55 0>;
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present-gpios = <&gpio0 60 0>;
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lochnagarclk: lochnagar-clk {
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compatible = "cirrus,lochnagar2-clk";
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#clock-cells = <1>;
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clocks = <&clkaudio>, <&clkpmic>;
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clock-names = "ln-gf-mclk2", "ln-pmic-32k";
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assigned-clocks = <&lochnagarclk LOCHNAGAR_CDC_MCLK1>,
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<&lochnagarclk LOCHNAGAR_CDC_MCLK2>;
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assigned-clock-parents = <&clkaudio>, <&clkpmic>;
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};
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clkpmic: lochnagar-pmic32k {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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pinctrl {
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compatible = "cirrus,lochnagar-pinctrl";
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&lochnagar 0 0 LOCHNAGAR2_PIN_NUM_GPIOS>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinsettings>;
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pinsettings: pin-settings {
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ap2aif-pins {
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input-enable;
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groups = "gf-aif1";
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function = "codec-aif3";
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};
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codec2aif-pins {
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output-enable;
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groups = "codec-aif3";
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function = "gf-aif1";
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};
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};
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};
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lochnagar-sc {
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compatible = "cirrus,lochnagar2-soundcard";
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#sound-dai-cells = <1>;
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clocks = <&lochnagarclk LOCHNAGAR_SOUNDCARD_MCLK>;
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clock-names = "mclk";
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};
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lochnagar-hwmon {
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compatible = "cirrus,lochnagar2-hwmon";
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};
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MIC1VDD {
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compatible = "cirrus,lochnagar2-mic1vdd";
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cirrus,micbias-input = <3>;
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};
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MICVDD {
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compatible = "cirrus,lochnagar2-micvdd";
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SYSVDD-supply = <&wallvdd>;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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VDD1V8 {
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compatible = "regulator-fixed";
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regulator-name = "VDD1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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vin-supply = <&wallvdd>;
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};
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};
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};
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