Commit 00117e3e authored by Asad Kamal's avatar Asad Kamal Committed by Alex Deucher
Browse files

drm/amd/pm: Add metrics table header for smu_v13_0_12 



Add metrics table header for smu_v13_0_12 as metrics version V2

Signed-off-by: default avatarAsad Kamal <asad.kamal@amd.com>
Reviewed-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b2d97a13

drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_pmfw.h

+109 −0
Original line number Diff line number Diff line
@@ -337,6 +337,115 @@ typedef struct __attribute__((packed, aligned(4))) { 
  uint32_t JpegBusy[32];

} MetricsTableV1_t;



// Metrics table for smu_v13_0_12

typedef struct __attribute__((packed, aligned(4))) {

  uint64_t AccumulationCounter;



  //TEMPERATURE

  uint32_t MaxSocketTemperature;

  uint32_t MaxVrTemperature;

  uint32_t MaxHbmTemperature;

  uint64_t MaxSocketTemperatureAcc;

  uint64_t MaxVrTemperatureAcc;

  uint64_t MaxHbmTemperatureAcc;



  //POWER

  uint32_t SocketPowerLimit;

  uint32_t MaxSocketPowerLimit;

  uint32_t SocketPower;



  //ENERGY

  uint64_t Timestamp;

  uint64_t SocketEnergyAcc;

  uint64_t CcdEnergyAcc;

  uint64_t XcdEnergyAcc;

  uint64_t AidEnergyAcc;

  uint64_t HbmEnergyAcc;



  //FREQUENCY

  uint32_t GfxclkFrequencyLimit;

  uint32_t FclkFrequency;

  uint32_t UclkFrequency;

  uint32_t SocclkFrequency[4];

  uint32_t VclkFrequency[4];

  uint32_t DclkFrequency[4];

  uint32_t LclkFrequency[4];

  uint64_t GfxclkFrequencyAcc[8];



  //FREQUENCY RANGE

  uint32_t MaxGfxclkFrequency;

  uint32_t MinGfxclkFrequency;

  uint32_t FclkFrequencyTable[4];

  uint32_t UclkFrequencyTable[4];

  uint32_t SocclkFrequencyTable[4];

  uint32_t VclkFrequencyTable[4];

  uint32_t DclkFrequencyTable[4];

  uint32_t LclkFrequencyTable[4];

  uint32_t MaxLclkDpmRange;

  uint32_t MinLclkDpmRange;



  //XGMI

  uint32_t XgmiWidth;

  uint32_t XgmiBitrate;

  uint64_t XgmiReadBandwidthAcc[8];

  uint64_t XgmiWriteBandwidthAcc[8];



  //ACTIVITY

  uint32_t SocketGfxBusy;

  uint32_t DramBandwidthUtilization;

  uint64_t SocketC0ResidencyAcc;

  uint64_t SocketGfxBusyAcc;

  uint64_t DramBandwidthAcc;

  uint32_t MaxDramBandwidth;

  uint64_t DramBandwidthUtilizationAcc;

  uint64_t PcieBandwidthAcc[4];



  //THROTTLERS

  uint32_t ProchotResidencyAcc;

  uint32_t PptResidencyAcc;

  uint32_t SocketThmResidencyAcc;

  uint32_t VrThmResidencyAcc;

  uint32_t HbmThmResidencyAcc;

  uint32_t GfxLockXCDMak;



  // New Items at end to maintain driver compatibility

  uint32_t GfxclkFrequency[8];



  //PSNs

  uint64_t PublicSerialNumber_AID[4];

  uint64_t PublicSerialNumber_XCD[8];



  //XGMI Data tranfser size

  uint64_t XgmiReadDataSizeAcc[8];//in KByte

  uint64_t XgmiWriteDataSizeAcc[8];//in KByte



  //PCIE BW Data and error count

  uint32_t PcieBandwidth[4];

  uint32_t PCIeL0ToRecoveryCountAcc;      // The Pcie counter itself is accumulated

  uint32_t PCIenReplayAAcc;               // The Pcie counter itself is accumulated

  uint32_t PCIenReplayARolloverCountAcc;  // The Pcie counter itself is accumulated

  uint32_t PCIeNAKSentCountAcc;           // The Pcie counter itself is accumulated

  uint32_t PCIeNAKReceivedCountAcc;       // The Pcie counter itself is accumulated



  // VCN/JPEG ACTIVITY

  uint32_t VcnBusy[4];

  uint32_t JpegBusy[32];



  // PCIE LINK Speed and width

  uint32_t PCIeLinkSpeed;

  uint32_t PCIeLinkWidth;



  // PER XCD ACTIVITY

  uint32_t GfxBusy[8];

  uint64_t GfxBusyAcc[8];



  //PCIE BW Data and error count

  uint32_t PCIeOtherEndRecoveryAcc;       // The Pcie counter itself is accumulated



  //Total App Clock Counter

  uint64_t GfxclkBelowHostLimitAcc[8];

} MetricsTableV2_t;



#define SMU_VF_METRICS_TABLE_VERSION 0x5



typedef struct __attribute__((packed, aligned(4))) {