Commit 00f918f6 authored by Anup Patel's avatar Anup Patel Committed by Anup Patel
Browse files

RISC-V: KVM: Skeletal in-kernel AIA irqchip support 



To incrementally implement in-kernel AIA irqchip support, we first
add minimal skeletal support which only compiles but does not provide
any functionality.

Signed-off-by: default avatarAnup Patel <apatel@ventanamicro.com>
Reviewed-by: default avatarAtish Patra <atishp@rivosinc.com>
Signed-off-by: default avatarAnup Patel <anup@brainfault.org>
parent f0607e62

arch/riscv/include/asm/kvm_aia.h

+20 −0
Original line number Diff line number Diff line
@@ -45,6 +45,7 @@ struct kvm_vcpu_aia { 
#define irqchip_in_kernel(k)		((k)->arch.aia.in_kernel)



extern unsigned int kvm_riscv_aia_nr_hgei;

extern unsigned int kvm_riscv_aia_max_ids;

DECLARE_STATIC_KEY_FALSE(kvm_riscv_aia_available);

#define kvm_riscv_aia_available() \

	static_branch_unlikely(&kvm_riscv_aia_available)
@@ -116,6 +117,25 @@ static inline void kvm_riscv_vcpu_aia_deinit(struct kvm_vcpu *vcpu) 
{

}



static inline int kvm_riscv_aia_inject_msi_by_id(struct kvm *kvm,

						 u32 hart_index,

						 u32 guest_index, u32 iid)

{

	return 0;

}



static inline int kvm_riscv_aia_inject_msi(struct kvm *kvm,

					   struct kvm_msi *msi)

{

	return 0;

}



static inline int kvm_riscv_aia_inject_irq(struct kvm *kvm,

					   unsigned int irq, bool level)

{

	return 0;

}



static inline void kvm_riscv_aia_init_vm(struct kvm *kvm)

{

}

arch/riscv/include/asm/kvm_host.h

+4 −0
Original line number Diff line number Diff line
@@ -27,6 +27,8 @@ 


#define KVM_VCPU_MAX_FEATURES		0



#define KVM_IRQCHIP_NUM_PINS		1024



#define KVM_REQ_SLEEP \

	KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)

#define KVM_REQ_VCPU_RESET		KVM_ARCH_REQ(1)
@@ -318,6 +320,8 @@ int kvm_riscv_gstage_vmid_init(struct kvm *kvm); 
bool kvm_riscv_gstage_vmid_ver_changed(struct kvm_vmid *vmid);

void kvm_riscv_gstage_vmid_update(struct kvm_vcpu *vcpu);



int kvm_riscv_setup_default_irq_routing(struct kvm *kvm, u32 lines);



void __kvm_riscv_unpriv_trap(void);



unsigned long kvm_riscv_vcpu_unpriv_read(struct kvm_vcpu *vcpu,

arch/riscv/include/uapi/asm/kvm.h

+4 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ 
#include <asm/bitsperlong.h>

#include <asm/ptrace.h>



#define __KVM_HAVE_IRQ_LINE

#define __KVM_HAVE_READONLY_MEM



#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
@@ -203,6 +204,9 @@ enum KVM_RISCV_SBI_EXT_ID { 
#define KVM_REG_RISCV_SBI_MULTI_REG_LAST	\

		KVM_REG_RISCV_SBI_MULTI_REG(KVM_RISCV_SBI_EXT_MAX - 1)



/* One single KVM irqchip, ie. the AIA */

#define KVM_NR_IRQCHIPS			1



#endif



#endif /* __LINUX_KVM_RISCV_H */

arch/riscv/kvm/Kconfig

+4 −0
Original line number Diff line number Diff line
@@ -21,6 +21,10 @@ config KVM 
	tristate "Kernel-based Virtual Machine (KVM) support (EXPERIMENTAL)"

	depends on RISCV_SBI && MMU

	select HAVE_KVM_EVENTFD

	select HAVE_KVM_IRQCHIP

	select HAVE_KVM_IRQFD

	select HAVE_KVM_IRQ_ROUTING

	select HAVE_KVM_MSI

	select HAVE_KVM_VCPU_ASYNC_IOCTL

	select KVM_GENERIC_DIRTYLOG_READ_PROTECT

	select KVM_GENERIC_HARDWARE_ENABLING

arch/riscv/kvm/aia.c

+8 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ static DEFINE_PER_CPU(struct aia_hgei_control, aia_hgei); 
static int hgei_parent_irq;



unsigned int kvm_riscv_aia_nr_hgei;

unsigned int kvm_riscv_aia_max_ids;

DEFINE_STATIC_KEY_FALSE(kvm_riscv_aia_available);



static int aia_find_hgei(struct kvm_vcpu *owner)
@@ -618,6 +619,13 @@ int kvm_riscv_aia_init(void) 
	 */

	kvm_riscv_aia_nr_hgei = 0;



	/*

	 * Find number of guest MSI IDs

	 *

	 * TODO: To be updated later by AIA IMSIC HW guest file support

	 */

	kvm_riscv_aia_max_ids = IMSIC_MAX_ID;



	/* Initialize guest external interrupt line management */

	rc = aia_hgei_init();

	if (rc)