Commit 0106424a authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch 'net-ftgmac100-add-soc-reset-support-for-rmii-mode' 

Jacky Chou says:

====================
net: ftgmac100: Add SoC reset support for RMII mode

This patch series adds support for an optional reset line to the
ftgmac100 ethernet controller, as used on Aspeed SoCs. On these SoCs,
the internal MAC reset is not sufficient to reset the RMII interface.
By providing a SoC-level reset via the device tree "resets" property,
the driver can properly reset both the MAC and RMII logic, ensuring
correct operation in RMII mode.

The series includes:
- Device tree binding update to document the new "resets" property.
- Addition of MAC1/2/3/4 reset definitions for AST2600.
- Driver changes to assert/deassert the reset line as needed.

This improves reliability and initialization of the MAC in RMII mode
on Aspeed platforms.
====================

Link: https://patch.msgid.link/20250709070809.2560688-1-jacky_chou@aspeedtech.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents 380a8891 af350ee7

Documentation/devicetree/bindings/net/faraday,ftgmac100.yaml

+18 −3
Original line number Diff line number Diff line
@@ -6,9 +6,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# 


title: Faraday Technology FTGMAC100 gigabit ethernet controller



allOf:

  - $ref: ethernet-controller.yaml#



maintainers:

  - Po-Yu Chuang <ratbert@faraday-tech.com>
@@ -35,6 +32,9 @@ properties: 
      - description: MAC IP clock

      - description: RMII RCLK gate for AST2500/2600



  resets:

    maxItems: 1



  clock-names:

    minItems: 1

    items:
@@ -74,6 +74,21 @@ required: 
  - reg

  - interrupts



allOf:

  - $ref: ethernet-controller.yaml#

  - if:

      properties:

        compatible:

          contains:

            enum:

              - aspeed,ast2600-mac

    then:

      properties:

        resets: true

    else:

      properties:

        resets: false



unevaluatedProperties: false



examples:

drivers/net/ethernet/faraday/ftgmac100.c

+26 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ 
#define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt



#include <linux/clk.h>

#include <linux/reset.h>

#include <linux/dma-mapping.h>

#include <linux/etherdevice.h>

#include <linux/ethtool.h>
@@ -101,6 +102,8 @@ struct ftgmac100 { 


	/* AST2500/AST2600 RMII ref clock gate */

	struct clk *rclk;

	/* Aspeed reset control */

	struct reset_control *rst;



	/* Link management */

	int cur_speed;
@@ -148,6 +151,23 @@ static int ftgmac100_reset_and_config_mac(struct ftgmac100 *priv) 
{

	u32 maccr = 0;



	/* Aspeed RMII needs SCU reset to clear status */

	if (priv->is_aspeed && priv->netdev->phydev->interface == PHY_INTERFACE_MODE_RMII) {

		int err;



		err = reset_control_assert(priv->rst);

		if (err) {

			dev_err(priv->dev, "Failed to reset mac (%d)\n", err);

			return err;

		}

		usleep_range(10000, 20000);

		err = reset_control_deassert(priv->rst);

		if (err) {

			dev_err(priv->dev, "Failed to deassert mac reset (%d)\n", err);

			return err;

		}

	}



	switch (priv->cur_speed) {

	case SPEED_10:

	case 0: /* no link */
@@ -1968,6 +1988,12 @@ static int ftgmac100_probe(struct platform_device *pdev) 


	}



	priv->rst = devm_reset_control_get_optional_exclusive(priv->dev, NULL);

	if (IS_ERR(priv->rst)) {

		err = PTR_ERR(priv->rst);

		goto err_phy_connect;

	}



	if (priv->is_aspeed) {

		err = ftgmac100_setup_clk(priv);

		if (err)

include/dt-bindings/clock/ast2600-clock.h

+2 −0
Original line number Diff line number Diff line
@@ -122,6 +122,8 @@ 
#define ASPEED_RESET_PCIE_DEV_OEN	20

#define ASPEED_RESET_PCIE_RC_O		19

#define ASPEED_RESET_PCIE_RC_OEN	18

#define ASPEED_RESET_MAC2		12

#define ASPEED_RESET_MAC1		11

#define ASPEED_RESET_PCI_DP		5

#define ASPEED_RESET_HACE		4

#define ASPEED_RESET_AHB		1