Commit 0177669e authored by Thomas Gleixner's avatar Thomas Gleixner Committed by Borislav Petkov (AMD)
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x86/microcode/intel: Cleanup code further



Sanitize the microcode scan loop, fixup printks and move the loading
function for builtin microcode next to the place where it is used and mark
it __init.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20231002115902.389400871@linutronix.de
parent 6b072022
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+32 −44
Original line number Diff line number Diff line
@@ -36,7 +36,7 @@ static const char ucode_path[] = "kernel/x86/microcode/GenuineIntel.bin";
static struct microcode_intel *intel_ucode_patch __read_mostly;

/* last level cache size per core */
static int llc_size_per_core __ro_after_init;
static unsigned int llc_size_per_core __ro_after_init;

/* microcode format is extended from prescott processors */
struct extended_signature {
@@ -294,29 +294,6 @@ static struct microcode_intel *scan_microcode(void *data, size_t size,
	return patch;
}

static bool load_builtin_intel_microcode(struct cpio_data *cp)
{
	unsigned int eax = 1, ebx, ecx = 0, edx;
	struct firmware fw;
	char name[30];

	if (IS_ENABLED(CONFIG_X86_32))
		return false;

	native_cpuid(&eax, &ebx, &ecx, &edx);

	sprintf(name, "intel-ucode/%02x-%02x-%02x",
		      x86_family(eax), x86_model(eax), x86_stepping(eax));

	if (firmware_request_builtin(&fw, name)) {
		cp->size = fw.size;
		cp->data = (void *)fw.data;
		return true;
	}

	return false;
}

static int apply_microcode_early(struct ucode_cpu_info *uci)
{
	struct microcode_intel *mc;
@@ -360,6 +337,28 @@ static int apply_microcode_early(struct ucode_cpu_info *uci)
	return 0;
}

static bool load_builtin_intel_microcode(struct cpio_data *cp)
{
	unsigned int eax = 1, ebx, ecx = 0, edx;
	struct firmware fw;
	char name[30];

	if (IS_ENABLED(CONFIG_X86_32))
		return false;

	native_cpuid(&eax, &ebx, &ecx, &edx);

	sprintf(name, "intel-ucode/%02x-%02x-%02x",
		x86_family(eax), x86_model(eax), x86_stepping(eax));

	if (firmware_request_builtin(&fw, name)) {
		cp->size = fw.size;
		cp->data = (void *)fw.data;
		return true;
	}
	return false;
}

int __init save_microcode_in_initrd_intel(void)
{
	struct ucode_cpu_info uci;
@@ -432,25 +431,16 @@ void load_ucode_intel_ap(void)
	apply_microcode_early(&uci);
}

/* Accessor for microcode pointer */
static struct microcode_intel *ucode_get_patch(void)
{
	return intel_ucode_patch;
}

void reload_ucode_intel(void)
{
	struct microcode_intel *p;
	struct ucode_cpu_info uci;

	intel_cpu_collect_info(&uci);

	p = ucode_get_patch();
	if (!p)
	uci.mc = intel_ucode_patch;
	if (!uci.mc)
		return;

	uci.mc = p;

	apply_microcode_early(&uci);
}

@@ -488,8 +478,7 @@ static enum ucode_state apply_microcode_intel(int cpu)
	if (WARN_ON(raw_smp_processor_id() != cpu))
		return UCODE_ERROR;

	/* Look for a newer patch in our cache: */
	mc = ucode_get_patch();
	mc = intel_ucode_patch;
	if (!mc) {
		mc = uci->mc;
		if (!mc)
@@ -685,13 +674,12 @@ static struct microcode_ops microcode_intel_ops = {
	.apply_microcode	= apply_microcode_intel,
};

static int __init calc_llc_size_per_core(struct cpuinfo_x86 *c)
static __init void calc_llc_size_per_core(struct cpuinfo_x86 *c)
{
	u64 llc_size = c->x86_cache_size * 1024ULL;

	do_div(llc_size, c->x86_max_cores);

	return (int)llc_size;
	llc_size_per_core = (unsigned int)llc_size;
}

struct microcode_ops * __init init_intel_microcode(void)
@@ -704,7 +692,7 @@ struct microcode_ops * __init init_intel_microcode(void)
		return NULL;
	}

	llc_size_per_core = calc_llc_size_per_core(c);
	calc_llc_size_per_core(c);

	return &microcode_intel_ops;
}