Commit 01ecadbe authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull Compute Express Link (CXL)  updates from Dave Jiang:

 - Add support for Global Persistent Flush (GPF)

 - Cleanup of DPA partition metadata handling:
     - Remove the CXL_DECODER_MIXED enum that's not needed anymore
     - Introduce helpers to access resource and perf meta data
     - Introduce 'struct cxl_dpa_partition' and 'struct cxl_range_info'
     - Make cxl_dpa_alloc() DPA partition number agnostic
     - Remove cxl_decoder_mode
     - Cleanup partition size and perf helpers

 - Remove unused CXL partition values

 - Add logging support for CXL CPER endpoint and port protocol errors:
     - Prefix protocol error struct and function names with cxl_
     - Move protocol error definitions and structures to a common location
     - Remove drivers/firmware/efi/cper_cxl.h to include/linux/cper.h
     - Add support in GHES to process CXL CPER protocol errors
     - Process CXL CPER protocol errors
     - Add trace logging for CXL PCIe port RAS errors

 - Remove redundant gp_port init

 - Add validation of cxl device serial number

 - CXL ABI documentation updates/fixups

 - A series that uses guard() to clean up open coded mutex lockings and
   remove gotos for error handling.

 - Some followup patches to support dirty shutdown accounting:
     - Add helper to retrieve DVSEC offset for dirty shutdown registers
     - Rename cxl_get_dirty_shutdown() to cxl_arm_dirty_shutdown()
     - Add support for dirty shutdown count via sysfs
     - cxl_test support for dirty shutdown

 - A series to support CXL mailbox Features commands.

   Mostly in preparation for CXL EDAC code to utilize the Features
   commands. It's also in preparation for CXL fwctl support to utilize
   the CXL Features. The commands include "Get Supported Features", "Get
   Feature", and "Set Feature".

 - A series to support extended linear cache support described by the
   ACPI HMAT table.

   The addition helps enumerate the cache and also provides additional
   RAS reporting support for configuration with extended linear cache.
   (and related fixes for the series).

 - An update to cxl_test to support a 3-way capable CFMWS

 - A documentation fix to remove unused "mixed mode"

* tag 'cxl-for-6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl: (39 commits)
  cxl/region: Fix the first aliased address miscalculation
  cxl/region: Quiet some dev_warn()s in extended linear cache setup
  cxl/Documentation: Remove 'mixed' from sysfs mode doc
  cxl: Fix warning from emitting resource_size_t as long long int on 32bit systems
  cxl/test: Define a CFMWS capable of a 3 way HB interleave
  cxl/mem: Do not return error if CONFIG_CXL_MCE unset
  tools/testing/cxl: Set Shutdown State support
  cxl/pmem: Export dirty shutdown count via sysfs
  cxl/pmem: Rename cxl_dirty_shutdown_state()
  cxl/pci: Introduce cxl_gpf_get_dvsec()
  cxl/pci: Support Global Persistent Flush (GPF)
  cxl: Document missing sysfs files
  cxl: Plug typos in ABI doc
  cxl/pmem: debug invalid serial number data
  cxl/cdat: Remove redundant gp_port initialization
  cxl/memdev: Remove unused partition values
  cxl/region: Drop goto pattern of construct_region()
  cxl/region: Drop goto pattern in cxl_dax_region_alloc()
  cxl/core: Use guard() to drop goto pattern of cxl_dpa_alloc()
  cxl/core: Use guard() to drop the goto pattern of cxl_dpa_free()
  ...
parents a1b5bd45 aae0594a
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+6 −0
Original line number Diff line number Diff line
@@ -177,6 +177,12 @@ Description:
		The cache write policy: 0 for write-back, 1 for write-through,
		other or unknown.

What:		/sys/devices/system/node/nodeX/memory_side_cache/indexY/address_mode
Date:		March 2025
Contact:	Dave Jiang <dave.jiang@intel.com>
Description:
		The address mode: 0 for reserved, 1 for extended-linear.

What:		/sys/devices/system/node/nodeX/x86/sgx_total_bytes
Date:		November 2021
Contact:	Jarkko Sakkinen <jarkko@kernel.org>
+41 −12
Original line number Diff line number Diff line
What:		/sys/bus/cxl/flush
Date:		Januarry, 2022
Date:		January, 2022
KernelVersion:	v5.18
Contact:	linux-cxl@vger.kernel.org
Description:
@@ -18,6 +18,24 @@ Description:
		specification.


What:		/sys/bus/cxl/devices/memX/payload_max
Date:		December, 2020
KernelVersion:	v5.12
Contact:	linux-cxl@vger.kernel.org
Description:
		(RO) Maximum size (in bytes) of the mailbox command payload
		registers. Linux caps this at 1MB if the device reports a
		larger size.


What:		/sys/bus/cxl/devices/memX/label_storage_size
Date:		May, 2021
KernelVersion:	v5.13
Contact:	linux-cxl@vger.kernel.org
Description:
		(RO) Size (in bytes) of the Label Storage Area (LSA).


What:		/sys/bus/cxl/devices/memX/ram/size
Date:		December, 2020
KernelVersion:	v5.12
@@ -33,7 +51,7 @@ Date: May, 2023
KernelVersion:	v6.8
Contact:	linux-cxl@vger.kernel.org
Description:
		(RO) For CXL host platforms that support "QoS Telemmetry"
		(RO) For CXL host platforms that support "QoS Telemetry"
		this attribute conveys a comma delimited list of platform
		specific cookies that identifies a QoS performance class
		for the volatile partition of the CXL mem device. These
@@ -60,7 +78,7 @@ Date: May, 2023
KernelVersion:	v6.8
Contact:	linux-cxl@vger.kernel.org
Description:
		(RO) For CXL host platforms that support "QoS Telemmetry"
		(RO) For CXL host platforms that support "QoS Telemetry"
		this attribute conveys a comma delimited list of platform
		specific cookies that identifies a QoS performance class
		for the persistent partition of the CXL mem device. These
@@ -321,14 +339,13 @@ KernelVersion: v6.0
Contact:	linux-cxl@vger.kernel.org
Description:
		(RW) When a CXL decoder is of devtype "cxl_decoder_endpoint" it
		translates from a host physical address range, to a device local
		address range. Device-local address ranges are further split
		into a 'ram' (volatile memory) range and 'pmem' (persistent
		memory) range. The 'mode' attribute emits one of 'ram', 'pmem',
		'mixed', or 'none'. The 'mixed' indication is for error cases
		when a decoder straddles the volatile/persistent partition
		boundary, and 'none' indicates the decoder is not actively
		decoding, or no DPA allocation policy has been set.
		translates from a host physical address range, to a device
		local address range. Device-local address ranges are further
		split into a 'ram' (volatile memory) range and 'pmem'
		(persistent memory) range. The 'mode' attribute emits one of
		'ram', 'pmem', or 'none'. The 'none' indicates the decoder is
		not actively decoding, or no DPA allocation policy has been
		set.

		'mode' can be written, when the decoder is in the 'disabled'
		state, with either 'ram' or 'pmem' to set the boundaries for the
@@ -423,7 +440,7 @@ Date: May, 2023
KernelVersion:	v6.5
Contact:	linux-cxl@vger.kernel.org
Description:
		(RO) For CXL host platforms that support "QoS Telemmetry" this
		(RO) For CXL host platforms that support "QoS Telemetry" this
		root-decoder-only attribute conveys a platform specific cookie
		that identifies a QoS performance class for the CXL Window.
		This class-id can be compared against a similar "qos_class"
@@ -586,3 +603,15 @@ Description:
		See Documentation/ABI/stable/sysfs-devices-node. access0 provides
		the number to the closest initiator and access1 provides the
		number to the closest CPU.


What:		/sys/bus/cxl/devices/nvdimm-bridge0/ndbusX/nmemY/cxl/dirty_shutdown
Date:		Feb, 2025
KernelVersion:	v6.15
Contact:	linux-cxl@vger.kernel.org
Description:
		(RO) The device dirty shutdown count value, which is the number
		of times the device could have incurred in potential data loss.
		The count is persistent across power loss and wraps back to 0
		upon overflow. If this file is not present, the device does not
		have the necessary support for dirty tracking.
+1 −1
Original line number Diff line number Diff line
@@ -130,7 +130,7 @@ Mailbox commands
* [0] Switch CCI
* [3] Timestamp
* [1] PMEM labels
* [0] PMEM GPF / Dirty Shutdown
* [3] PMEM GPF / Dirty Shutdown
* [0] Scan Media

PMU
+1 −0
Original line number Diff line number Diff line
@@ -2274,6 +2274,7 @@ int set_mce_nospec(unsigned long pfn)
		pr_warn("Could not invalidate pfn=0x%lx from 1:1 map\n", pfn);
	return rc;
}
EXPORT_SYMBOL_GPL(set_mce_nospec);

/* Restore full speculative operation to the pfn. */
int clear_mce_nospec(unsigned long pfn)
+103 −0
Original line number Diff line number Diff line
@@ -674,6 +674,105 @@ static void ghes_defer_non_standard_event(struct acpi_hest_generic_data *gdata,
	schedule_work(&entry->work);
}

/* Room for 8 entries */
#define CXL_CPER_PROT_ERR_FIFO_DEPTH 8
static DEFINE_KFIFO(cxl_cper_prot_err_fifo, struct cxl_cper_prot_err_work_data,
		    CXL_CPER_PROT_ERR_FIFO_DEPTH);

/* Synchronize schedule_work() with cxl_cper_prot_err_work changes */
static DEFINE_SPINLOCK(cxl_cper_prot_err_work_lock);
struct work_struct *cxl_cper_prot_err_work;

static void cxl_cper_post_prot_err(struct cxl_cper_sec_prot_err *prot_err,
				   int severity)
{
#ifdef CONFIG_ACPI_APEI_PCIEAER
	struct cxl_cper_prot_err_work_data wd;
	u8 *dvsec_start, *cap_start;

	if (!(prot_err->valid_bits & PROT_ERR_VALID_AGENT_ADDRESS)) {
		pr_err_ratelimited("CXL CPER invalid agent type\n");
		return;
	}

	if (!(prot_err->valid_bits & PROT_ERR_VALID_ERROR_LOG)) {
		pr_err_ratelimited("CXL CPER invalid protocol error log\n");
		return;
	}

	if (prot_err->err_len != sizeof(struct cxl_ras_capability_regs)) {
		pr_err_ratelimited("CXL CPER invalid RAS Cap size (%u)\n",
				   prot_err->err_len);
		return;
	}

	if (!(prot_err->valid_bits & PROT_ERR_VALID_SERIAL_NUMBER))
		pr_warn(FW_WARN "CXL CPER no device serial number\n");

	guard(spinlock_irqsave)(&cxl_cper_prot_err_work_lock);

	if (!cxl_cper_prot_err_work)
		return;

	switch (prot_err->agent_type) {
	case RCD:
	case DEVICE:
	case LD:
	case FMLD:
	case RP:
	case DSP:
	case USP:
		memcpy(&wd.prot_err, prot_err, sizeof(wd.prot_err));

		dvsec_start = (u8 *)(prot_err + 1);
		cap_start = dvsec_start + prot_err->dvsec_len;

		memcpy(&wd.ras_cap, cap_start, sizeof(wd.ras_cap));
		wd.severity = cper_severity_to_aer(severity);
		break;
	default:
		pr_err_ratelimited("CXL CPER invalid agent type: %d\n",
				   prot_err->agent_type);
		return;
	}

	if (!kfifo_put(&cxl_cper_prot_err_fifo, wd)) {
		pr_err_ratelimited("CXL CPER kfifo overflow\n");
		return;
	}

	schedule_work(cxl_cper_prot_err_work);
#endif
}

int cxl_cper_register_prot_err_work(struct work_struct *work)
{
	if (cxl_cper_prot_err_work)
		return -EINVAL;

	guard(spinlock)(&cxl_cper_prot_err_work_lock);
	cxl_cper_prot_err_work = work;
	return 0;
}
EXPORT_SYMBOL_NS_GPL(cxl_cper_register_prot_err_work, "CXL");

int cxl_cper_unregister_prot_err_work(struct work_struct *work)
{
	if (cxl_cper_prot_err_work != work)
		return -EINVAL;

	guard(spinlock)(&cxl_cper_prot_err_work_lock);
	cxl_cper_prot_err_work = NULL;
	return 0;
}
EXPORT_SYMBOL_NS_GPL(cxl_cper_unregister_prot_err_work, "CXL");

int cxl_cper_prot_err_kfifo_get(struct cxl_cper_prot_err_work_data *wd)
{
	return kfifo_get(&cxl_cper_prot_err_fifo, wd);
}
EXPORT_SYMBOL_NS_GPL(cxl_cper_prot_err_kfifo_get, "CXL");

/* Room for 8 entries for each of the 4 event log queues */
#define CXL_CPER_FIFO_DEPTH 32
DEFINE_KFIFO(cxl_cper_fifo, struct cxl_cper_work_data, CXL_CPER_FIFO_DEPTH);
@@ -777,6 +876,10 @@ static bool ghes_do_proc(struct ghes *ghes,
		}
		else if (guid_equal(sec_type, &CPER_SEC_PROC_ARM)) {
			queued = ghes_handle_arm_hw_error(gdata, sev, sync);
		} else if (guid_equal(sec_type, &CPER_SEC_CXL_PROT_ERR)) {
			struct cxl_cper_sec_prot_err *prot_err = acpi_hest_get_payload(gdata);

			cxl_cper_post_prot_err(prot_err, gdata->error_severity);
		} else if (guid_equal(sec_type, &CPER_SEC_CXL_GEN_MEDIA_GUID)) {
			struct cxl_cper_event_rec *rec = acpi_hest_get_payload(gdata);

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