Commit 0267ee19 authored by Radhakrishna Sripada's avatar Radhakrishna Sripada Committed by Matt Roper
Browse files

drm/xe/xelpg: Add Wa_14020495402 



Disable clockgating for TDL SVHS fub.

v2: Extend the Wa to 1274(MattR)

Bspec: 46045
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Signed-off-by: default avatarRadhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240318210120.564692-1-radhakrishna.sripada@intel.com
parent dd1c6105

drivers/gpu/drm/xe/regs/xe_gt_regs.h

+1 −0
Original line number Diff line number Diff line
@@ -364,6 +364,7 @@ 
#define   DISABLE_EARLY_READ			REG_BIT(14)

#define   ENABLE_LARGE_GRF_MODE			REG_BIT(12)

#define   PUSH_CONST_DEREF_HOLD_DIS		REG_BIT(8)

#define   DISABLE_TDL_SVHS_GATING		REG_BIT(1)

#define   DISABLE_DOP_GATING			REG_BIT(0)



#define RT_CTRL					XE_REG_MCR(0xe530)

drivers/gpu/drm/xe/xe_wa.c

+5 −0
Original line number Diff line number Diff line
@@ -401,6 +401,11 @@ static const struct xe_rtp_entry_sr engine_was[] = { 
	  XE_RTP_ACTIONS(SET(XEHP_HDC_CHICKEN0, DIS_ATOMIC_CHAINING_TYPED_WRITES,

			     XE_RTP_NOCHECK))

	},

	{ XE_RTP_NAME("14020495402"),

	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1270, 1274),

		       FUNC(xe_rtp_match_first_render_or_compute)),

	  XE_RTP_ACTIONS(SET(ROW_CHICKEN2, DISABLE_TDL_SVHS_GATING))

	},



	/* Xe2_LPG */