Loading arch/arm/Kconfig +0 −16 Original line number Diff line number Diff line Loading @@ -51,9 +51,6 @@ config MIGHT_HAVE_PCI config SYS_SUPPORTS_APM_EMULATION bool config HAVE_SCHED_CLOCK bool config GENERIC_GPIO bool Loading Loading @@ -438,7 +435,6 @@ config ARCH_MXC select CLKDEV_LOOKUP select CLKSRC_MMIO select GENERIC_IRQ_CHIP select HAVE_SCHED_CLOCK select MULTI_IRQ_HANDLER help Support for Freescale MXC/iMX-based family of processors Loading Loading @@ -530,7 +526,6 @@ config ARCH_IXP4XX select CPU_XSCALE select GENERIC_GPIO select GENERIC_CLOCKEVENTS select HAVE_SCHED_CLOCK select MIGHT_HAVE_PCI select DMABOUNCE if PCI help Loading Loading @@ -601,7 +596,6 @@ config ARCH_MMP select CLKDEV_LOOKUP select GENERIC_CLOCKEVENTS select GPIO_PXA select HAVE_SCHED_CLOCK select TICK_ONESHOT select PLAT_PXA select SPARSE_IRQ Loading Loading @@ -642,7 +636,6 @@ config ARCH_TEGRA select GENERIC_CLOCKEVENTS select GENERIC_GPIO select HAVE_CLK select HAVE_SCHED_CLOCK select HAVE_SMP select MIGHT_HAVE_CACHE_L2X0 select ARCH_HAS_CPUFREQ Loading @@ -659,7 +652,6 @@ config ARCH_PICOXCELL select DW_APB_TIMER select GENERIC_CLOCKEVENTS select GENERIC_GPIO select HAVE_SCHED_CLOCK select HAVE_TCM select NO_IOPORT select SPARSE_IRQ Loading Loading @@ -687,7 +679,6 @@ config ARCH_PXA select ARCH_REQUIRE_GPIOLIB select GENERIC_CLOCKEVENTS select GPIO_PXA select HAVE_SCHED_CLOCK select TICK_ONESHOT select PLAT_PXA select SPARSE_IRQ Loading Loading @@ -755,7 +746,6 @@ config ARCH_SA1100 select CPU_FREQ select GENERIC_CLOCKEVENTS select CLKDEV_LOOKUP select HAVE_SCHED_CLOCK select TICK_ONESHOT select ARCH_REQUIRE_GPIOLIB select HAVE_IDE Loading Loading @@ -812,7 +802,6 @@ config ARCH_S5P64X0 select CLKSRC_MMIO select HAVE_S3C2410_WATCHDOG if WATCHDOG select GENERIC_CLOCKEVENTS select HAVE_SCHED_CLOCK select HAVE_S3C2410_I2C if I2C select HAVE_S3C_RTC if RTC_CLASS help Loading Loading @@ -845,7 +834,6 @@ config ARCH_S5PV210 select ARM_L1_CACHE_SHIFT_6 select ARCH_HAS_CPUFREQ select GENERIC_CLOCKEVENTS select HAVE_SCHED_CLOCK select HAVE_S3C2410_I2C if I2C select HAVE_S3C_RTC if RTC_CLASS select HAVE_S3C2410_WATCHDOG if WATCHDOG Loading Loading @@ -888,7 +876,6 @@ config ARCH_U300 depends on MMU select CLKSRC_MMIO select CPU_ARM926T select HAVE_SCHED_CLOCK select HAVE_TCM select ARM_AMBA select ARM_PATCH_PHYS_VIRT Loading Loading @@ -946,7 +933,6 @@ config ARCH_OMAP select ARCH_HAS_CPUFREQ select CLKSRC_MMIO select GENERIC_CLOCKEVENTS select HAVE_SCHED_CLOCK select ARCH_HAS_HOLES_MEMORYMODEL help Support for TI's OMAP platform (OMAP1/2/3/4). Loading Loading @@ -1112,13 +1098,11 @@ config ARCH_ACORN config PLAT_IOP bool select GENERIC_CLOCKEVENTS select HAVE_SCHED_CLOCK config PLAT_ORION bool select CLKSRC_MMIO select GENERIC_IRQ_CHIP select HAVE_SCHED_CLOCK config PLAT_PXA bool Loading arch/arm/kernel/Makefile +2 −3 Original line number Diff line number Diff line Loading @@ -14,8 +14,8 @@ CFLAGS_REMOVE_return_address.o = -pg # Object file lists. obj-y := elf.o entry-armv.o entry-common.o irq.o opcodes.o \ process.o ptrace.o return_address.o setup.o signal.o \ sys_arm.o stacktrace.o time.o traps.o process.o ptrace.o return_address.o sched_clock.o \ setup.o signal.o stacktrace.o sys_arm.o time.o traps.o obj-$(CONFIG_DEPRECATED_PARAM_STRUCT) += compat.o Loading @@ -30,7 +30,6 @@ obj-$(CONFIG_ARTHUR) += arthur.o obj-$(CONFIG_ISA_DMA) += dma-isa.o obj-$(CONFIG_PCI) += bios32.o isa.o obj-$(CONFIG_ARM_CPU_SUSPEND) += sleep.o suspend.o obj-$(CONFIG_HAVE_SCHED_CLOCK) += sched_clock.o obj-$(CONFIG_SMP) += smp.o smp_tlb.o obj-$(CONFIG_HAVE_ARM_SCU) += smp_scu.o obj-$(CONFIG_HAVE_ARM_TWD) += smp_twd.o Loading arch/arm/kernel/time.c +0 −2 Original line number Diff line number Diff line Loading @@ -147,8 +147,6 @@ void __init time_init(void) { system_timer = machine_desc->timer; system_timer->init(); #ifdef CONFIG_HAVE_SCHED_CLOCK sched_clock_postinit(); #endif } arch/arm/mach-davinci/time.c +10 −18 Original line number Diff line number Diff line Loading @@ -19,11 +19,14 @@ #include <linux/err.h> #include <linux/platform_device.h> #include <mach/hardware.h> #include <asm/sched_clock.h> #include <asm/mach/irq.h> #include <asm/mach/time.h> #include <mach/cputype.h> #include <mach/hardware.h> #include <mach/time.h> #include "clock.h" static struct clock_event_device clockevent_davinci; Loading Loading @@ -272,19 +275,9 @@ static cycle_t read_cycles(struct clocksource *cs) return (cycles_t)timer32_read(t); } /* * Kernel assumes that sched_clock can be called early but may not have * things ready yet. */ static cycle_t read_dummy(struct clocksource *cs) { return 0; } static struct clocksource clocksource_davinci = { .rating = 300, .read = read_dummy, .read = read_cycles, .mask = CLOCKSOURCE_MASK(32), .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; Loading @@ -292,12 +285,9 @@ static struct clocksource clocksource_davinci = { /* * Overwrite weak default sched_clock with something more precise */ unsigned long long notrace sched_clock(void) static u32 notrace davinci_read_sched_clock(void) { const cycle_t cyc = clocksource_davinci.read(&clocksource_davinci); return clocksource_cyc2ns(cyc, clocksource_davinci.mult, clocksource_davinci.shift); return timer32_read(&timers[TID_CLOCKSOURCE]); } /* Loading Loading @@ -397,12 +387,14 @@ static void __init davinci_timer_init(void) davinci_clock_tick_rate = clk_get_rate(timer_clk); /* setup clocksource */ clocksource_davinci.read = read_cycles; clocksource_davinci.name = id_to_name[clocksource_id]; if (clocksource_register_hz(&clocksource_davinci, davinci_clock_tick_rate)) printk(err, clocksource_davinci.name); setup_sched_clock(davinci_read_sched_clock, 32, davinci_clock_tick_rate); /* setup clockevent */ clockevent_davinci.name = id_to_name[timers[TID_CLOCKEVENT].id]; clockevent_davinci.mult = div_sc(davinci_clock_tick_rate, NSEC_PER_SEC, Loading arch/arm/mach-prima2/timer.c +7 −14 Original line number Diff line number Diff line Loading @@ -18,6 +18,7 @@ #include <linux/of.h> #include <linux/of_address.h> #include <mach/map.h> #include <asm/sched_clock.h> #include <asm/mach/time.h> #define SIRFSOC_TIMER_COUNTER_LO 0x0000 Loading Loading @@ -165,21 +166,9 @@ static struct irqaction sirfsoc_timer_irq = { }; /* Overwrite weak default sched_clock with more precise one */ unsigned long long notrace sched_clock(void) static u32 notrace sirfsoc_read_sched_clock(void) { static int is_mapped; /* * sched_clock is called earlier than .init of sys_timer * if we map timer memory in .init of sys_timer, system * will panic due to illegal memory access */ if (!is_mapped) { sirfsoc_of_timer_map(); is_mapped = 1; } return sirfsoc_timer_read(NULL) * (NSEC_PER_SEC / CLOCK_TICK_RATE); return (u32)(sirfsoc_timer_read(NULL) & 0xffffffff); } static void __init sirfsoc_clockevent_init(void) Loading Loading @@ -210,6 +199,8 @@ static void __init sirfsoc_timer_init(void) BUG_ON(rate < CLOCK_TICK_RATE); BUG_ON(rate % CLOCK_TICK_RATE); sirfsoc_of_timer_map(); writel_relaxed(rate / CLOCK_TICK_RATE / 2 - 1, sirfsoc_timer_base + SIRFSOC_TIMER_DIV); writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_LO); writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_HI); Loading @@ -217,6 +208,8 @@ static void __init sirfsoc_timer_init(void) BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE)); setup_sched_clock(sirfsoc_read_sched_clock, 32, CLOCK_TICK_RATE); BUG_ON(setup_irq(sirfsoc_timer_irq.irq, &sirfsoc_timer_irq)); sirfsoc_clockevent_init(); Loading Loading
arch/arm/Kconfig +0 −16 Original line number Diff line number Diff line Loading @@ -51,9 +51,6 @@ config MIGHT_HAVE_PCI config SYS_SUPPORTS_APM_EMULATION bool config HAVE_SCHED_CLOCK bool config GENERIC_GPIO bool Loading Loading @@ -438,7 +435,6 @@ config ARCH_MXC select CLKDEV_LOOKUP select CLKSRC_MMIO select GENERIC_IRQ_CHIP select HAVE_SCHED_CLOCK select MULTI_IRQ_HANDLER help Support for Freescale MXC/iMX-based family of processors Loading Loading @@ -530,7 +526,6 @@ config ARCH_IXP4XX select CPU_XSCALE select GENERIC_GPIO select GENERIC_CLOCKEVENTS select HAVE_SCHED_CLOCK select MIGHT_HAVE_PCI select DMABOUNCE if PCI help Loading Loading @@ -601,7 +596,6 @@ config ARCH_MMP select CLKDEV_LOOKUP select GENERIC_CLOCKEVENTS select GPIO_PXA select HAVE_SCHED_CLOCK select TICK_ONESHOT select PLAT_PXA select SPARSE_IRQ Loading Loading @@ -642,7 +636,6 @@ config ARCH_TEGRA select GENERIC_CLOCKEVENTS select GENERIC_GPIO select HAVE_CLK select HAVE_SCHED_CLOCK select HAVE_SMP select MIGHT_HAVE_CACHE_L2X0 select ARCH_HAS_CPUFREQ Loading @@ -659,7 +652,6 @@ config ARCH_PICOXCELL select DW_APB_TIMER select GENERIC_CLOCKEVENTS select GENERIC_GPIO select HAVE_SCHED_CLOCK select HAVE_TCM select NO_IOPORT select SPARSE_IRQ Loading Loading @@ -687,7 +679,6 @@ config ARCH_PXA select ARCH_REQUIRE_GPIOLIB select GENERIC_CLOCKEVENTS select GPIO_PXA select HAVE_SCHED_CLOCK select TICK_ONESHOT select PLAT_PXA select SPARSE_IRQ Loading Loading @@ -755,7 +746,6 @@ config ARCH_SA1100 select CPU_FREQ select GENERIC_CLOCKEVENTS select CLKDEV_LOOKUP select HAVE_SCHED_CLOCK select TICK_ONESHOT select ARCH_REQUIRE_GPIOLIB select HAVE_IDE Loading Loading @@ -812,7 +802,6 @@ config ARCH_S5P64X0 select CLKSRC_MMIO select HAVE_S3C2410_WATCHDOG if WATCHDOG select GENERIC_CLOCKEVENTS select HAVE_SCHED_CLOCK select HAVE_S3C2410_I2C if I2C select HAVE_S3C_RTC if RTC_CLASS help Loading Loading @@ -845,7 +834,6 @@ config ARCH_S5PV210 select ARM_L1_CACHE_SHIFT_6 select ARCH_HAS_CPUFREQ select GENERIC_CLOCKEVENTS select HAVE_SCHED_CLOCK select HAVE_S3C2410_I2C if I2C select HAVE_S3C_RTC if RTC_CLASS select HAVE_S3C2410_WATCHDOG if WATCHDOG Loading Loading @@ -888,7 +876,6 @@ config ARCH_U300 depends on MMU select CLKSRC_MMIO select CPU_ARM926T select HAVE_SCHED_CLOCK select HAVE_TCM select ARM_AMBA select ARM_PATCH_PHYS_VIRT Loading Loading @@ -946,7 +933,6 @@ config ARCH_OMAP select ARCH_HAS_CPUFREQ select CLKSRC_MMIO select GENERIC_CLOCKEVENTS select HAVE_SCHED_CLOCK select ARCH_HAS_HOLES_MEMORYMODEL help Support for TI's OMAP platform (OMAP1/2/3/4). Loading Loading @@ -1112,13 +1098,11 @@ config ARCH_ACORN config PLAT_IOP bool select GENERIC_CLOCKEVENTS select HAVE_SCHED_CLOCK config PLAT_ORION bool select CLKSRC_MMIO select GENERIC_IRQ_CHIP select HAVE_SCHED_CLOCK config PLAT_PXA bool Loading
arch/arm/kernel/Makefile +2 −3 Original line number Diff line number Diff line Loading @@ -14,8 +14,8 @@ CFLAGS_REMOVE_return_address.o = -pg # Object file lists. obj-y := elf.o entry-armv.o entry-common.o irq.o opcodes.o \ process.o ptrace.o return_address.o setup.o signal.o \ sys_arm.o stacktrace.o time.o traps.o process.o ptrace.o return_address.o sched_clock.o \ setup.o signal.o stacktrace.o sys_arm.o time.o traps.o obj-$(CONFIG_DEPRECATED_PARAM_STRUCT) += compat.o Loading @@ -30,7 +30,6 @@ obj-$(CONFIG_ARTHUR) += arthur.o obj-$(CONFIG_ISA_DMA) += dma-isa.o obj-$(CONFIG_PCI) += bios32.o isa.o obj-$(CONFIG_ARM_CPU_SUSPEND) += sleep.o suspend.o obj-$(CONFIG_HAVE_SCHED_CLOCK) += sched_clock.o obj-$(CONFIG_SMP) += smp.o smp_tlb.o obj-$(CONFIG_HAVE_ARM_SCU) += smp_scu.o obj-$(CONFIG_HAVE_ARM_TWD) += smp_twd.o Loading
arch/arm/kernel/time.c +0 −2 Original line number Diff line number Diff line Loading @@ -147,8 +147,6 @@ void __init time_init(void) { system_timer = machine_desc->timer; system_timer->init(); #ifdef CONFIG_HAVE_SCHED_CLOCK sched_clock_postinit(); #endif }
arch/arm/mach-davinci/time.c +10 −18 Original line number Diff line number Diff line Loading @@ -19,11 +19,14 @@ #include <linux/err.h> #include <linux/platform_device.h> #include <mach/hardware.h> #include <asm/sched_clock.h> #include <asm/mach/irq.h> #include <asm/mach/time.h> #include <mach/cputype.h> #include <mach/hardware.h> #include <mach/time.h> #include "clock.h" static struct clock_event_device clockevent_davinci; Loading Loading @@ -272,19 +275,9 @@ static cycle_t read_cycles(struct clocksource *cs) return (cycles_t)timer32_read(t); } /* * Kernel assumes that sched_clock can be called early but may not have * things ready yet. */ static cycle_t read_dummy(struct clocksource *cs) { return 0; } static struct clocksource clocksource_davinci = { .rating = 300, .read = read_dummy, .read = read_cycles, .mask = CLOCKSOURCE_MASK(32), .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; Loading @@ -292,12 +285,9 @@ static struct clocksource clocksource_davinci = { /* * Overwrite weak default sched_clock with something more precise */ unsigned long long notrace sched_clock(void) static u32 notrace davinci_read_sched_clock(void) { const cycle_t cyc = clocksource_davinci.read(&clocksource_davinci); return clocksource_cyc2ns(cyc, clocksource_davinci.mult, clocksource_davinci.shift); return timer32_read(&timers[TID_CLOCKSOURCE]); } /* Loading Loading @@ -397,12 +387,14 @@ static void __init davinci_timer_init(void) davinci_clock_tick_rate = clk_get_rate(timer_clk); /* setup clocksource */ clocksource_davinci.read = read_cycles; clocksource_davinci.name = id_to_name[clocksource_id]; if (clocksource_register_hz(&clocksource_davinci, davinci_clock_tick_rate)) printk(err, clocksource_davinci.name); setup_sched_clock(davinci_read_sched_clock, 32, davinci_clock_tick_rate); /* setup clockevent */ clockevent_davinci.name = id_to_name[timers[TID_CLOCKEVENT].id]; clockevent_davinci.mult = div_sc(davinci_clock_tick_rate, NSEC_PER_SEC, Loading
arch/arm/mach-prima2/timer.c +7 −14 Original line number Diff line number Diff line Loading @@ -18,6 +18,7 @@ #include <linux/of.h> #include <linux/of_address.h> #include <mach/map.h> #include <asm/sched_clock.h> #include <asm/mach/time.h> #define SIRFSOC_TIMER_COUNTER_LO 0x0000 Loading Loading @@ -165,21 +166,9 @@ static struct irqaction sirfsoc_timer_irq = { }; /* Overwrite weak default sched_clock with more precise one */ unsigned long long notrace sched_clock(void) static u32 notrace sirfsoc_read_sched_clock(void) { static int is_mapped; /* * sched_clock is called earlier than .init of sys_timer * if we map timer memory in .init of sys_timer, system * will panic due to illegal memory access */ if (!is_mapped) { sirfsoc_of_timer_map(); is_mapped = 1; } return sirfsoc_timer_read(NULL) * (NSEC_PER_SEC / CLOCK_TICK_RATE); return (u32)(sirfsoc_timer_read(NULL) & 0xffffffff); } static void __init sirfsoc_clockevent_init(void) Loading Loading @@ -210,6 +199,8 @@ static void __init sirfsoc_timer_init(void) BUG_ON(rate < CLOCK_TICK_RATE); BUG_ON(rate % CLOCK_TICK_RATE); sirfsoc_of_timer_map(); writel_relaxed(rate / CLOCK_TICK_RATE / 2 - 1, sirfsoc_timer_base + SIRFSOC_TIMER_DIV); writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_LO); writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_HI); Loading @@ -217,6 +208,8 @@ static void __init sirfsoc_timer_init(void) BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE)); setup_sched_clock(sirfsoc_read_sched_clock, 32, CLOCK_TICK_RATE); BUG_ON(setup_irq(sirfsoc_timer_irq.irq, &sirfsoc_timer_irq)); sirfsoc_clockevent_init(); Loading