Commit 035fdc38 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'mediatek-drm-next-6.7' of... 

Merge tag 'mediatek-drm-next-6.7' of https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux

 into drm-next

Mediatek DRM Next for Linux 6.7

1. Add support MT8188 dsi function
2. Fix coverity issue with unintentional integer overflow
3. Add support MT8188 dp/edp function
4. Fix memory leak on ->get_edid callback audio detection
   and error path.
5. Add connector dynamic selection capability
6. MediaTek DDP GAMMA - 12-bit LUT support
7. mtk_dsi: Fix NO_EOT_PACKET settings/handling

[airlied: add bitfield.h include]
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20231018135846.5811-1-chunkuang.hu@kernel.org
parents 55b72855 5855d422

Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml

+2 −0
Original line number Diff line number Diff line
@@ -21,6 +21,8 @@ description: | 
properties:

  compatible:

    enum:

      - mediatek,mt8188-dp-tx

      - mediatek,mt8188-edp-tx

      - mediatek,mt8195-dp-tx

      - mediatek,mt8195-edp-tx

Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml

+1 −0
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@ properties: 
          - mediatek,mt8173-dsi

          - mediatek,mt8183-dsi

          - mediatek,mt8186-dsi

          - mediatek,mt8188-dsi

      - items:

          - enum:

              - mediatek,mt6795-dsi

drivers/gpu/drm/mediatek/mtk_disp_aal.c

+78 −9
Original line number Diff line number Diff line
@@ -3,6 +3,7 @@ 
 * Copyright (c) 2021 MediaTek Inc.

 */



#include <linux/bitfield.h>

#include <linux/clk.h>

#include <linux/component.h>

#include <linux/module.h>
@@ -17,14 +18,31 @@ 


#define DISP_AAL_EN				0x0000

#define AAL_EN						BIT(0)

#define DISP_AAL_CFG				0x0020

#define AAL_RELAY_MODE					BIT(0)

#define AAL_GAMMA_LUT_EN				BIT(1)

#define DISP_AAL_SIZE				0x0030

#define DISP_AAL_SIZE_HSIZE				GENMASK(28, 16)

#define DISP_AAL_SIZE_VSIZE				GENMASK(12, 0)

#define DISP_AAL_OUTPUT_SIZE			0x04d8



#define DISP_AAL_GAMMA_LUT			0x0700

#define DISP_AAL_GAMMA_LUT_R				GENMASK(29, 20)

#define DISP_AAL_GAMMA_LUT_G				GENMASK(19, 10)

#define DISP_AAL_GAMMA_LUT_B				GENMASK(9, 0)

#define DISP_AAL_LUT_BITS			10

#define DISP_AAL_LUT_SIZE			512



struct mtk_disp_aal_data {

	bool has_gamma;

};



 /**

  * struct mtk_disp_aal - Display Adaptive Ambient Light driver structure

  * @clk:      clock for DISP_AAL controller

  * @regs:     MMIO registers base

  * @cmdq_reg: CMDQ Client register

  * @data:     platform specific data for DISP_AAL

  */

struct mtk_disp_aal {

	struct clk *clk;

	void __iomem *regs;
@@ -51,17 +69,69 @@ void mtk_aal_config(struct device *dev, unsigned int w, 
			   unsigned int bpc, struct cmdq_pkt *cmdq_pkt)

{

	struct mtk_disp_aal *aal = dev_get_drvdata(dev);

	u32 sz;



	sz = FIELD_PREP(DISP_AAL_SIZE_HSIZE, w);

	sz |= FIELD_PREP(DISP_AAL_SIZE_VSIZE, h);



	mtk_ddp_write(cmdq_pkt, w << 16 | h, &aal->cmdq_reg, aal->regs, DISP_AAL_SIZE);

	mtk_ddp_write(cmdq_pkt, w << 16 | h, &aal->cmdq_reg, aal->regs, DISP_AAL_OUTPUT_SIZE);

	mtk_ddp_write(cmdq_pkt, sz, &aal->cmdq_reg, aal->regs, DISP_AAL_SIZE);

	mtk_ddp_write(cmdq_pkt, sz, &aal->cmdq_reg, aal->regs, DISP_AAL_OUTPUT_SIZE);

}



void mtk_aal_gamma_set(struct device *dev, struct drm_crtc_state *state)

/**

 * mtk_aal_gamma_get_lut_size() - Get gamma LUT size for AAL

 * @dev: Pointer to struct device

 *

 * Return: 0 if gamma control not supported in AAL or gamma LUT size

 */

unsigned int mtk_aal_gamma_get_lut_size(struct device *dev)

{

	struct mtk_disp_aal *aal = dev_get_drvdata(dev);



	if (aal->data && aal->data->has_gamma)

		mtk_gamma_set_common(aal->regs, state, false);

		return DISP_AAL_LUT_SIZE;

	return 0;

}



void mtk_aal_gamma_set(struct device *dev, struct drm_crtc_state *state)

{

	struct mtk_disp_aal *aal = dev_get_drvdata(dev);

	struct drm_color_lut *lut;

	unsigned int i;

	u32 cfg_val;



	/* If gamma is not supported in AAL, go out immediately */

	if (!(aal->data && aal->data->has_gamma))

		return;



	/* Also, if there's no gamma lut there's nothing to do here. */

	if (!state->gamma_lut)

		return;



	lut = (struct drm_color_lut *)state->gamma_lut->data;

	for (i = 0; i < DISP_AAL_LUT_SIZE; i++) {

		struct drm_color_lut hwlut = {

			.red = drm_color_lut_extract(lut[i].red, DISP_AAL_LUT_BITS),

			.green = drm_color_lut_extract(lut[i].green, DISP_AAL_LUT_BITS),

			.blue = drm_color_lut_extract(lut[i].blue, DISP_AAL_LUT_BITS)

		};

		u32 word;



		word = FIELD_PREP(DISP_AAL_GAMMA_LUT_R, hwlut.red);

		word |= FIELD_PREP(DISP_AAL_GAMMA_LUT_G, hwlut.green);

		word |= FIELD_PREP(DISP_AAL_GAMMA_LUT_B, hwlut.blue);

		writel(word, aal->regs + DISP_AAL_GAMMA_LUT + i * 4);

	}



	cfg_val = readl(aal->regs + DISP_AAL_CFG);



	/* Enable the gamma table */

	cfg_val |= FIELD_PREP(AAL_GAMMA_LUT_EN, 1);



	/* Disable RELAY mode to pass the processed image */

	cfg_val &= ~AAL_RELAY_MODE;



	writel(cfg_val, aal->regs + DISP_AAL_CFG);

}



void mtk_aal_start(struct device *dev)
@@ -144,10 +214,9 @@ static const struct mtk_disp_aal_data mt8173_aal_driver_data = { 
};



static const struct of_device_id mtk_disp_aal_driver_dt_match[] = {

	{ .compatible = "mediatek,mt8173-disp-aal",

	  .data = &mt8173_aal_driver_data},

	{ .compatible = "mediatek,mt8173-disp-aal", .data = &mt8173_aal_driver_data },

	{ .compatible = "mediatek,mt8183-disp-aal" },

	{},

	{ /* sentinel */ }

};

MODULE_DEVICE_TABLE(of, mtk_disp_aal_driver_dt_match);

drivers/gpu/drm/mediatek/mtk_disp_drv.h

+4 −1
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ void mtk_aal_clk_disable(struct device *dev); 
void mtk_aal_config(struct device *dev, unsigned int w,

		    unsigned int h, unsigned int vrefresh,

		    unsigned int bpc, struct cmdq_pkt *cmdq_pkt);

unsigned int mtk_aal_gamma_get_lut_size(struct device *dev);

void mtk_aal_gamma_set(struct device *dev, struct drm_crtc_state *state);

void mtk_aal_start(struct device *dev);

void mtk_aal_stop(struct device *dev);
@@ -44,17 +45,19 @@ void mtk_dither_set_common(void __iomem *regs, struct cmdq_client_reg *cmdq_reg, 


void mtk_dpi_start(struct device *dev);

void mtk_dpi_stop(struct device *dev);

unsigned int mtk_dpi_encoder_index(struct device *dev);



void mtk_dsi_ddp_start(struct device *dev);

void mtk_dsi_ddp_stop(struct device *dev);

unsigned int mtk_dsi_encoder_index(struct device *dev);



int mtk_gamma_clk_enable(struct device *dev);

void mtk_gamma_clk_disable(struct device *dev);

void mtk_gamma_config(struct device *dev, unsigned int w,

		      unsigned int h, unsigned int vrefresh,

		      unsigned int bpc, struct cmdq_pkt *cmdq_pkt);

unsigned int mtk_gamma_get_lut_size(struct device *dev);

void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state);

void mtk_gamma_set_common(void __iomem *regs, struct drm_crtc_state *state, bool lut_diff);

void mtk_gamma_start(struct device *dev);

void mtk_gamma_stop(struct device *dev);

drivers/gpu/drm/mediatek/mtk_disp_gamma.c

+164 −39
Original line number Diff line number Diff line
@@ -3,6 +3,7 @@ 
 * Copyright (c) 2021 MediaTek Inc.

 */



#include <linux/bitfield.h>

#include <linux/clk.h>

#include <linux/component.h>

#include <linux/module.h>
@@ -18,20 +19,43 @@ 
#define DISP_GAMMA_EN				0x0000

#define GAMMA_EN					BIT(0)

#define DISP_GAMMA_CFG				0x0020

#define GAMMA_RELAY_MODE				BIT(0)

#define GAMMA_LUT_EN					BIT(1)

#define GAMMA_DITHERING					BIT(2)

#define GAMMA_LUT_TYPE					BIT(2)

#define DISP_GAMMA_SIZE				0x0030

#define DISP_GAMMA_SIZE_HSIZE				GENMASK(28, 16)

#define DISP_GAMMA_SIZE_VSIZE				GENMASK(12, 0)

#define DISP_GAMMA_BANK				0x0100

#define DISP_GAMMA_BANK_BANK				GENMASK(1, 0)

#define DISP_GAMMA_BANK_DATA_MODE			BIT(2)

#define DISP_GAMMA_LUT				0x0700

#define DISP_GAMMA_LUT1				0x0b00



#define LUT_10BIT_MASK				0x03ff

/* For 10 bit LUT layout, R/G/B are in the same register */

#define DISP_GAMMA_LUT_10BIT_R			GENMASK(29, 20)

#define DISP_GAMMA_LUT_10BIT_G			GENMASK(19, 10)

#define DISP_GAMMA_LUT_10BIT_B			GENMASK(9, 0)



/* For 12 bit LUT layout, R/G are in LUT, B is in LUT1 */

#define DISP_GAMMA_LUT_12BIT_R			GENMASK(11, 0)

#define DISP_GAMMA_LUT_12BIT_G			GENMASK(23, 12)

#define DISP_GAMMA_LUT_12BIT_B			GENMASK(11, 0)



struct mtk_disp_gamma_data {

	bool has_dither;

	bool lut_diff;

	u16 lut_bank_size;

	u16 lut_size;

	u8 lut_bits;

};



/*

 * struct mtk_disp_gamma - DISP_GAMMA driver structure

/**

 * struct mtk_disp_gamma - Display Gamma driver structure

 * @clk:      clock for DISP_GAMMA block

 * @regs:     MMIO registers base

 * @cmdq_reg: CMDQ Client register

 * @data:     platform data for DISP_GAMMA

 */

struct mtk_disp_gamma {

	struct clk *clk;
@@ -54,49 +78,132 @@ void mtk_gamma_clk_disable(struct device *dev) 
	clk_disable_unprepare(gamma->clk);

}



void mtk_gamma_set_common(void __iomem *regs, struct drm_crtc_state *state, bool lut_diff)

unsigned int mtk_gamma_get_lut_size(struct device *dev)

{

	struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);



	if (gamma && gamma->data)

		return gamma->data->lut_size;

	return 0;

}



static bool mtk_gamma_lut_is_descending(struct drm_color_lut *lut, u32 lut_size)

{

	u64 first, last;

	int last_entry = lut_size - 1;



	first = lut[0].red + lut[0].green + lut[0].blue;

	last = lut[last_entry].red + lut[last_entry].green + lut[last_entry].blue;



	return !!(first > last);

}



/*

 * SoCs supporting 12-bits LUTs are using a new register layout that does

 * always support (by HW) both 12-bits and 10-bits LUT but, on those, we

 * ignore the support for 10-bits in this driver and always use 12-bits.

 *

 * Summarizing:

 * - SoC HW support 9/10-bits LUT only

 *   - Old register layout

 *     - 10-bits LUT supported

 *     - 9-bits LUT not supported

 * - SoC HW support both 10/12bits LUT

 *   - New register layout

 *     - 12-bits LUT supported

 *     - 10-its LUT not supported

 */

void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state)

{

	unsigned int i, reg;

	struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);

	void __iomem *lut0_base = gamma->regs + DISP_GAMMA_LUT;

	void __iomem *lut1_base = gamma->regs + DISP_GAMMA_LUT1;

	u32 cfg_val, data_mode, lbank_val, word[2];

	u8 lut_bits = gamma->data->lut_bits;

	int cur_bank, num_lut_banks;

	struct drm_color_lut *lut;

	void __iomem *lut_base;

	u32 word;

	u32 diff[3] = {0};



	if (state->gamma_lut) {

		reg = readl(regs + DISP_GAMMA_CFG);

		reg = reg | GAMMA_LUT_EN;

		writel(reg, regs + DISP_GAMMA_CFG);

		lut_base = regs + DISP_GAMMA_LUT;

	unsigned int i;



	/* If there's no gamma lut there's nothing to do here. */

	if (!state->gamma_lut)

		return;



	num_lut_banks = gamma->data->lut_size / gamma->data->lut_bank_size;

	lut = (struct drm_color_lut *)state->gamma_lut->data;

		for (i = 0; i < MTK_LUT_SIZE; i++) {



			if (!lut_diff || (i % 2 == 0)) {

				word = (((lut[i].red >> 6) & LUT_10BIT_MASK) << 20) +

					(((lut[i].green >> 6) & LUT_10BIT_MASK) << 10) +

					((lut[i].blue >> 6) & LUT_10BIT_MASK);

	/* Switch to 12 bits data mode if supported */

	data_mode = FIELD_PREP(DISP_GAMMA_BANK_DATA_MODE, !!(lut_bits == 12));



	for (cur_bank = 0; cur_bank < num_lut_banks; cur_bank++) {



		/* Switch gamma bank and set data mode before writing LUT */

		if (num_lut_banks > 1) {

			lbank_val = FIELD_PREP(DISP_GAMMA_BANK_BANK, cur_bank);

			lbank_val |= data_mode;

			writel(lbank_val, gamma->regs + DISP_GAMMA_BANK);

		}



		for (i = 0; i < gamma->data->lut_bank_size; i++) {

			int n = cur_bank * gamma->data->lut_bank_size + i;

			struct drm_color_lut diff, hwlut;



			hwlut.red = drm_color_lut_extract(lut[n].red, lut_bits);

			hwlut.green = drm_color_lut_extract(lut[n].green, lut_bits);

			hwlut.blue = drm_color_lut_extract(lut[n].blue, lut_bits);



			if (!gamma->data->lut_diff || (i % 2 == 0)) {

				if (lut_bits == 12) {

					word[0] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_R, hwlut.red);

					word[0] |= FIELD_PREP(DISP_GAMMA_LUT_12BIT_G, hwlut.green);

					word[1] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_B, hwlut.blue);

				} else {

				diff[0] = (lut[i].red >> 6) - (lut[i - 1].red >> 6);

				diff[1] = (lut[i].green >> 6) - (lut[i - 1].green >> 6);

				diff[2] = (lut[i].blue >> 6) - (lut[i - 1].blue >> 6);

					word[0] = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);

					word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green);

					word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);

				}

			} else {

				diff.red = lut[n].red - lut[n - 1].red;

				diff.red = drm_color_lut_extract(diff.red, lut_bits);



				diff.green = lut[n].green - lut[n - 1].green;

				diff.green = drm_color_lut_extract(diff.green, lut_bits);



				word = ((diff[0] & LUT_10BIT_MASK) << 20) +

					((diff[1] & LUT_10BIT_MASK) << 10) +

					(diff[2] & LUT_10BIT_MASK);

				diff.blue = lut[n].blue - lut[n - 1].blue;

				diff.blue = drm_color_lut_extract(diff.blue, lut_bits);



				if (lut_bits == 12) {

					word[0] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_R, diff.red);

					word[0] |= FIELD_PREP(DISP_GAMMA_LUT_12BIT_G, diff.green);

					word[1] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_B, diff.blue);

				} else {

					word[0] = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);

					word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);

					word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue);

				}

			writel(word, (lut_base + i * 4));

			}

			writel(word[0], lut0_base + i * 4);

			if (lut_bits == 12)

				writel(word[1], lut1_base + i * 4);

		}

	}



void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state)

{

	struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);

	bool lut_diff = false;

	cfg_val = readl(gamma->regs + DISP_GAMMA_CFG);



	if (!gamma->data->has_dither) {

		/* Descending or Rising LUT */

		if (mtk_gamma_lut_is_descending(lut, gamma->data->lut_size - 1))

			cfg_val |= FIELD_PREP(GAMMA_LUT_TYPE, 1);

		else

			cfg_val &= ~GAMMA_LUT_TYPE;

	}



	if (gamma->data)

		lut_diff = gamma->data->lut_diff;

	/* Enable the gamma table */

	cfg_val |= FIELD_PREP(GAMMA_LUT_EN, 1);



	mtk_gamma_set_common(gamma->regs, state, lut_diff);

	/* Disable RELAY mode to pass the processed image */

	cfg_val &= ~GAMMA_RELAY_MODE;



	cfg_val = readl(gamma->regs + DISP_GAMMA_CFG);

}



void mtk_gamma_config(struct device *dev, unsigned int w,
@@ -104,9 +211,12 @@ void mtk_gamma_config(struct device *dev, unsigned int w, 
		      unsigned int bpc, struct cmdq_pkt *cmdq_pkt)

{

	struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);

	u32 sz;



	sz = FIELD_PREP(DISP_GAMMA_SIZE_HSIZE, w);

	sz |= FIELD_PREP(DISP_GAMMA_SIZE_VSIZE, h);



	mtk_ddp_write(cmdq_pkt, h << 16 | w, &gamma->cmdq_reg, gamma->regs,

		      DISP_GAMMA_SIZE);

	mtk_ddp_write(cmdq_pkt, sz, &gamma->cmdq_reg, gamma->regs, DISP_GAMMA_SIZE);

	if (gamma->data && gamma->data->has_dither)

		mtk_dither_set_common(gamma->regs, &gamma->cmdq_reg, bpc,

				      DISP_GAMMA_CFG, GAMMA_DITHERING, cmdq_pkt);
@@ -189,10 +299,23 @@ static void mtk_disp_gamma_remove(struct platform_device *pdev) 


static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = {

	.has_dither = true,

	.lut_bank_size = 512,

	.lut_bits = 10,

	.lut_size = 512,

};



static const struct mtk_disp_gamma_data mt8183_gamma_driver_data = {

	.lut_bank_size = 512,

	.lut_bits = 10,

	.lut_diff = true,

	.lut_size = 512,

};



static const struct mtk_disp_gamma_data mt8195_gamma_driver_data = {

	.lut_bank_size = 256,

	.lut_bits = 12,

	.lut_diff = true,

	.lut_size = 1024,

};



static const struct of_device_id mtk_disp_gamma_driver_dt_match[] = {
@@ -200,6 +323,8 @@ static const struct of_device_id mtk_disp_gamma_driver_dt_match[] = { 
	  .data = &mt8173_gamma_driver_data},

	{ .compatible = "mediatek,mt8183-disp-gamma",

	  .data = &mt8183_gamma_driver_data},

	{ .compatible = "mediatek,mt8195-disp-gamma",

	  .data = &mt8195_gamma_driver_data},

	{},

};

MODULE_DEVICE_TABLE(of, mtk_disp_gamma_driver_dt_match);