Unverified Commit 037df296 authored by Andy Chiu's avatar Andy Chiu Committed by Palmer Dabbelt
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dt-bindings: riscv: add Zve32[xf] Zve64[xfd] ISA extension description 



Add description for Zve32x Zve32f Zve64x Zve64f Zve64d ISA extensions.

Signed-off-by: default avatarAndy Chiu <andy.chiu@sifive.com>
Acked-by: default avatarConor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240510-zve-detection-v5-4-0711bdd26c12@sifive.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 98a5700d

Documentation/devicetree/bindings/riscv/extensions.yaml

+30 −0
Original line number Diff line number Diff line
@@ -381,6 +381,36 @@ properties: 
            instructions, as ratified in commit 56ed795 ("Update

            riscv-crypto-spec-vector.adoc") of riscv-crypto.



        - const: zve32f

          description:

            The standard Zve32f extension for embedded processors, as ratified

            in commit 6f702a2 ("Vector extensions are now ratified") of

            riscv-v-spec.



        - const: zve32x

          description:

            The standard Zve32x extension for embedded processors, as ratified

            in commit 6f702a2 ("Vector extensions are now ratified") of

            riscv-v-spec.



        - const: zve64d

          description:

            The standard Zve64d extension for embedded processors, as ratified

            in commit 6f702a2 ("Vector extensions are now ratified") of

            riscv-v-spec.



        - const: zve64f

          description:

            The standard Zve64f extension for embedded processors, as ratified

            in commit 6f702a2 ("Vector extensions are now ratified") of

            riscv-v-spec.



        - const: zve64x

          description:

            The standard Zve64x extension for embedded processors, as ratified

            in commit 6f702a2 ("Vector extensions are now ratified") of

            riscv-v-spec.



        - const: zvfh

          description:

            The standard Zvfh extension for vectored half-precision