Commit 03bbb39d authored by Andreas Kemnade's avatar Andreas Kemnade Committed by Shawn Guo
Browse files

ARM: dts: imx: imx6sll-kobo-clara2e: add regulator for EPD 



Now there is a driver and binding for the JD9930, so add the information
to the devicetree for revision b.

Signed-off-by: default avatarAndreas Kemnade <andreas@kemnade.info>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent e8280244

arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clara2e-b.dts

+60 −1
Original line number Diff line number Diff line
@@ -16,8 +16,67 @@ 
/ {

	model = "Kobo Clara 2E";

	compatible = "kobo,clara2e-b", "kobo,clara2e", "fsl,imx6sll";



	epd_pmic_supply: regulator-epd-pmic-in {

		compatible = "regulator-fixed";

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_epd_pmic_supply>;

		regulator-name = "epd_pmic_supply";

		gpio = <&gpio2 14 GPIO_ACTIVE_HIGH>;

		enable-active-high;

		startup-delay-us = <20000>;

	};

};



&i2c2 {

	/* EPD PMIC JD9930 at 0x18 */

	jd9930: pmic@18 {

		compatible = "fitipower,jd9930", "fitipower,fp9931";

		reg = <0x18>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_jd9930_gpio>;

		vin-supply = <&epd_pmic_supply>;

		pg-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;

		en-ts-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;

		enable-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;

		fitipower,tdly-ms = <2 2 2 2>;



		regulators {

			vcom_reg: vcom {

				regulator-name = "vcom";

				/*

				 * For optimal performance these should be

				 * tuned on a per batch basis e.g. using

				 * overlays.

				 */

				regulator-min-microvolt = <2352840>;

				regulator-max-microvolt = <2352840>;

			};



			vposneg_reg: vposneg {

				regulator-name = "vposneg";

				regulator-min-microvolt = <15060000>;

				regulator-max-microvolt = <15060000>;

			};



			v3p3_reg: v3p3 {

				regulator-name = "v3p3";

			};

		};

	};

};



&iomuxc {

	pinctrl_jd9930_gpio: jd9930-gpiogrp {

		fsl,pins = <

			MX6SLL_PAD_EPDC_PWR_CTRL0__GPIO2_IO07	0x17059 /* PG */

			MX6SLL_PAD_EPDC_PWR_CTRL1__GPIO2_IO08	0x40010059 /* EN */

			MX6SLL_PAD_EPDC_PWR_CTRL2__GPIO2_IO09	0x40010059 /* EN_TS */

		>;

	};



	pinctrl_epd_pmic_supply: epd-pmic-supplygrp {

		fsl,pins = <

			MX6SLL_PAD_EPDC_PWR_WAKE__GPIO2_IO14	0x40010059

		>;

	};

};