Commit 0565d20c authored by Peng Fan's avatar Peng Fan Committed by Shawn Guo
Browse files

arm64: dts: freescale: Support i.MX93 9x9 Quick Start Board 



Add the board device tree with sdhc1/2, cm33, mu, lpuart1, lpi2c1/2,
usb enabled and etc, which to support the i.MX 93 quick start evaluation
kit that provides a low-cost platform to evaluate the i.MX 93 applications
processors in a 9x9mm package.

Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent b8f77103

arch/arm64/boot/dts/freescale/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -235,6 +235,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-iris-v2.dtb 
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8qxp-tqma8xqp-mba8xx.dtb

dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx93-9x9-qsb.dtb

dtb-$(CONFIG_ARCH_MXC) += imx93-11x11-evk.dtb

dtb-$(CONFIG_ARCH_MXC) += imx93-phyboard-segin.dtb

dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxca.dtb

arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts

0 → 100644
+492 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0-only OR MIT)

/*

 * Copyright 2024 NXP

 */



/dts-v1/;



#include <dt-bindings/usb/pd.h>

#include "imx93.dtsi"



/ {

	model = "NXP i.MX93 9x9 Quick Start Board";

	compatible = "fsl,imx93-9x9-qsb", "fsl,imx93";



	chosen {

		stdout-path = &lpuart1;

	};



	reserved-memory {

		#address-cells = <2>;

		#size-cells = <2>;

		ranges;



		linux,cma {

			compatible = "shared-dma-pool";

			reusable;

			size = <0 0x10000000>;

			linux,cma-default;

		};



		vdev0vring0: vdev0vring0@a4000000 {

			reg = <0 0xa4000000 0 0x8000>;

			no-map;

		};



		vdev0vring1: vdev0vring1@a4008000 {

			reg = <0 0xa4008000 0 0x8000>;

			no-map;

		};



		vdev1vring0: vdev1vring0@a4010000 {

			reg = <0 0xa4010000 0 0x8000>;

			no-map;

		};



		vdev1vring1: vdev1vring1@a4018000 {

			reg = <0 0xa4018000 0 0x8000>;

			no-map;

		};



		rsc_table: rsc-table@2021e000 {

			reg = <0 0x2021e000 0 0x1000>;

			no-map;

		};



		vdevbuffer: vdevbuffer@a4020000 {

			compatible = "shared-dma-pool";

			reg = <0 0xa4020000 0 0x100000>;

			no-map;

		};



	};



	reg_vref_1v8: regulator-adc-vref {

		compatible = "regulator-fixed";

		regulator-name = "VREF_1V8";

		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <1800000>;

	};



	reg_rpi_3v3: regulator-rpi {

		compatible = "regulator-fixed";

		regulator-name = "VDD_RPI_3V3";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		gpio = <&pcal6524 21 GPIO_ACTIVE_HIGH>;

		enable-active-high;

	};



	reg_usdhc2_vmmc: regulator-usdhc2 {

		compatible = "regulator-fixed";

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;

		regulator-name = "VSD_3V3";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>;

		enable-active-high;

		off-on-delay-us = <12000>;

	};

};



&adc1 {

	vref-supply = <&reg_vref_1v8>;

	status = "okay";

};



&cm33 {

	mbox-names = "tx", "rx", "rxdb";

	mboxes = <&mu1 0 1>,

		 <&mu1 1 1>,

		 <&mu1 3 1>;

	memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,

			<&vdev1vring0>, <&vdev1vring1>, <&rsc_table>;

	status = "okay";

};



&eqos {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_eqos>;

	phy-mode = "rgmii-id";

	phy-handle = <&ethphy1>;

	status = "okay";



	mdio {

		compatible = "snps,dwmac-mdio";

		#address-cells = <1>;

		#size-cells = <0>;

		clock-frequency = <5000000>;



		ethphy1: ethernet-phy@1 {

			compatible = "ethernet-phy-ieee802.3-c22";

			reg = <1>;

			eee-broken-1000t;

			reset-gpios = <&pcal6524 15 GPIO_ACTIVE_LOW>;

			reset-assert-us = <10000>;

			reset-deassert-us = <80000>;

			realtek,clkout-disable;

		};

	};

};



&lpi2c1 {

	clock-frequency = <400000>;

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_lpi2c1>;

	status = "okay";



	ptn5110: tcpc@50 {

		compatible = "nxp,ptn5110", "tcpci";

		reg = <0x50>;

		interrupt-parent = <&gpio3>;

		interrupts = <26 IRQ_TYPE_LEVEL_LOW>;



		typec1_con: connector {

			compatible = "usb-c-connector";

			label = "USB-C";

			power-role = "dual";

			data-role = "dual";

			try-power-role = "sink";

			source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;

			sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)

				     PDO_VAR(5000, 20000, 3000)>;

			op-sink-microwatt = <15000000>;

			self-powered;



			ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@0 {

					reg = <0>;



					typec1_dr_sw: endpoint {

						remote-endpoint = <&usb1_drd_sw>;

					};

				};

			};

		};

	};



	rtc@53 {

		compatible = "nxp,pcf2131";

		reg = <0x53>;

		interrupt-parent = <&pcal6524>;

		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;

	};

};



&lpi2c2 {

	#address-cells = <1>;

	#size-cells = <0>;

	clock-frequency = <400000>;

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_lpi2c2>;

	status = "okay";



	pcal6524: gpio@22 {

		compatible = "nxp,pcal6524";

		reg = <0x22>;

		gpio-controller;

		#gpio-cells = <2>;

		interrupt-controller;

		#interrupt-cells = <2>;

		interrupt-parent = <&gpio3>;

		interrupts = <26 IRQ_TYPE_LEVEL_LOW>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_pcal6524>;

	};



	pmic@25 {

		compatible = "nxp,pca9451a";

		reg = <0x25>;

		interrupt-parent = <&pcal6524>;

		interrupts = <11 IRQ_TYPE_EDGE_FALLING>;



		regulators {

			buck1: BUCK1 {

				regulator-name = "BUCK1";

				regulator-min-microvolt = <650000>;

				regulator-max-microvolt = <2237500>;

				regulator-boot-on;

				regulator-always-on;

				regulator-ramp-delay = <3125>;

			};



			buck2: BUCK2 {

				regulator-name = "BUCK2";

				regulator-min-microvolt = <600000>;

				regulator-max-microvolt = <2187500>;

				regulator-boot-on;

				regulator-always-on;

				regulator-ramp-delay = <3125>;

			};



			buck4: BUCK4{

				regulator-name = "BUCK4";

				regulator-min-microvolt = <600000>;

				regulator-max-microvolt = <3400000>;

				regulator-boot-on;

				regulator-always-on;

			};



			buck5: BUCK5{

				regulator-name = "BUCK5";

				regulator-min-microvolt = <600000>;

				regulator-max-microvolt = <3400000>;

				regulator-boot-on;

				regulator-always-on;

			};



			buck6: BUCK6 {

				regulator-name = "BUCK6";

				regulator-min-microvolt = <600000>;

				regulator-max-microvolt = <3400000>;

				regulator-boot-on;

				regulator-always-on;

			};



			ldo1: LDO1 {

				regulator-name = "LDO1";

				regulator-min-microvolt = <1600000>;

				regulator-max-microvolt = <3300000>;

				regulator-boot-on;

				regulator-always-on;

			};



			ldo4: LDO4 {

				regulator-name = "LDO4";

				regulator-min-microvolt = <800000>;

				regulator-max-microvolt = <3300000>;

				regulator-boot-on;

				regulator-always-on;

			};



			ldo5: LDO5 {

				regulator-name = "LDO5";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <3300000>;

				regulator-boot-on;

				regulator-always-on;

			};

		};

	};

};



&lpuart1 { /* console */

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_uart1>;

	status = "okay";

};



&mu1 {

	status = "okay";

};



&mu2 {

	status = "okay";

};



&usbotg1 {

	dr_mode = "otg";

	hnp-disable;

	srp-disable;

	adp-disable;

	usb-role-switch;

	disable-over-current;

	samsung,picophy-pre-emp-curr-control = <3>;

	samsung,picophy-dc-vol-level-adjust = <7>;

	status = "okay";



	port {

		usb1_drd_sw: endpoint {

			remote-endpoint = <&typec1_dr_sw>;

		};

	};

};



&usdhc1 {

	pinctrl-names = "default", "state_100mhz", "state_200mhz";

	pinctrl-0 = <&pinctrl_usdhc1>;

	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;

	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;

	bus-width = <8>;

	non-removable;

	status = "okay";

};



&usdhc2 {

	pinctrl-names = "default", "state_100mhz", "state_200mhz";

	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;

	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;

	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;

	cd-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;

	vmmc-supply = <&reg_usdhc2_vmmc>;

	bus-width = <4>;

	no-mmc;

	status = "okay";

};



&wdog3 {

	status = "okay";

};



&iomuxc {

	pinctrl_eqos: eqosgrp {

		fsl,pins = <

			MX93_PAD_ENET1_MDC__ENET_QOS_MDC			0x57e

			MX93_PAD_ENET1_MDIO__ENET_QOS_MDIO			0x57e

			MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0			0x57e

			MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1			0x57e

			MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2			0x57e

			MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3			0x57e

			MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK	0x58e

			MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL		0x57e

			MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0			0x57e

			MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1			0x57e

			MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2			0x57e

			MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3			0x57e

			MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK	0x58e

			MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL		0x57e

		>;

	};



	pinctrl_lpi2c1: lpi2c1grp {

		fsl,pins = <

			MX93_PAD_I2C1_SCL__LPI2C1_SCL		0x40000b9e

			MX93_PAD_I2C1_SDA__LPI2C1_SDA		0x40000b9e

		>;

	};



	pinctrl_lpi2c2: lpi2c2grp {

		fsl,pins = <

			MX93_PAD_I2C2_SCL__LPI2C2_SCL		0x40000b9e

			MX93_PAD_I2C2_SDA__LPI2C2_SDA		0x40000b9e

		>;

	};



	pinctrl_pcal6524: pcal6524grp {

		fsl,pins = <

			MX93_PAD_CCM_CLKO1__GPIO3_IO26		0x31e

		>;

	};



	pinctrl_uart1: uart1grp {

		fsl,pins = <

			MX93_PAD_UART1_RXD__LPUART1_RX		0x31e

			MX93_PAD_UART1_TXD__LPUART1_TX		0x31e

		>;

	};



	pinctrl_uart5: uart5grp {

		fsl,pins = <

			MX93_PAD_DAP_TDO_TRACESWO__LPUART5_TX	0x31e

			MX93_PAD_DAP_TDI__LPUART5_RX		0x31e

			MX93_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B	0x31e

			MX93_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B	0x31e

		>;

	};



	/* need to config the SION for data and cmd pad, refer to ERR052021 */

	pinctrl_usdhc1: usdhc1grp {

		fsl,pins = <

			MX93_PAD_SD1_CLK__USDHC1_CLK		0x1582

			MX93_PAD_SD1_CMD__USDHC1_CMD		0x40001382

			MX93_PAD_SD1_DATA0__USDHC1_DATA0	0x40001382

			MX93_PAD_SD1_DATA1__USDHC1_DATA1	0x40001382

			MX93_PAD_SD1_DATA2__USDHC1_DATA2	0x40001382

			MX93_PAD_SD1_DATA3__USDHC1_DATA3	0x40001382

			MX93_PAD_SD1_DATA4__USDHC1_DATA4	0x40001382

			MX93_PAD_SD1_DATA5__USDHC1_DATA5	0x40001382

			MX93_PAD_SD1_DATA6__USDHC1_DATA6	0x40001382

			MX93_PAD_SD1_DATA7__USDHC1_DATA7	0x40001382

			MX93_PAD_SD1_STROBE__USDHC1_STROBE	0x1582

		>;

	};



	/* need to config the SION for data and cmd pad, refer to ERR052021 */

	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {

		fsl,pins = <

			MX93_PAD_SD1_CLK__USDHC1_CLK		0x158e

			MX93_PAD_SD1_CMD__USDHC1_CMD		0x4000138e

			MX93_PAD_SD1_DATA0__USDHC1_DATA0	0x4000138e

			MX93_PAD_SD1_DATA1__USDHC1_DATA1	0x4000138e

			MX93_PAD_SD1_DATA2__USDHC1_DATA2	0x4000138e

			MX93_PAD_SD1_DATA3__USDHC1_DATA3	0x4000138e

			MX93_PAD_SD1_DATA4__USDHC1_DATA4	0x4000138e

			MX93_PAD_SD1_DATA5__USDHC1_DATA5	0x4000138e

			MX93_PAD_SD1_DATA6__USDHC1_DATA6	0x4000138e

			MX93_PAD_SD1_DATA7__USDHC1_DATA7	0x4000138e

			MX93_PAD_SD1_STROBE__USDHC1_STROBE	0x158e

		>;

	};



	/* need to config the SION for data and cmd pad, refer to ERR052021 */

	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {

		fsl,pins = <

			MX93_PAD_SD1_CLK__USDHC1_CLK		0x15fe

			MX93_PAD_SD1_CMD__USDHC1_CMD		0x400013fe

			MX93_PAD_SD1_DATA0__USDHC1_DATA0	0x400013fe

			MX93_PAD_SD1_DATA1__USDHC1_DATA1	0x400013fe

			MX93_PAD_SD1_DATA2__USDHC1_DATA2	0x400013fe

			MX93_PAD_SD1_DATA3__USDHC1_DATA3	0x400013fe

			MX93_PAD_SD1_DATA4__USDHC1_DATA4	0x400013fe

			MX93_PAD_SD1_DATA5__USDHC1_DATA5	0x400013fe

			MX93_PAD_SD1_DATA6__USDHC1_DATA6	0x400013fe

			MX93_PAD_SD1_DATA7__USDHC1_DATA7	0x400013fe

			MX93_PAD_SD1_STROBE__USDHC1_STROBE	0x15fe

		>;

	};



	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {

		fsl,pins = <

			MX93_PAD_SD2_RESET_B__GPIO3_IO07	0x31e

		>;

	};



	pinctrl_usdhc2_gpio: usdhc2gpiogrp {

		fsl,pins = <

			MX93_PAD_SD2_CD_B__GPIO3_IO00		0x31e

		>;

	};



	/* need to config the SION for data and cmd pad, refer to ERR052021 */

	pinctrl_usdhc2: usdhc2grp {

		fsl,pins = <

			MX93_PAD_SD2_CLK__USDHC2_CLK		0x1582

			MX93_PAD_SD2_CMD__USDHC2_CMD		0x40001382

			MX93_PAD_SD2_DATA0__USDHC2_DATA0	0x40001382

			MX93_PAD_SD2_DATA1__USDHC2_DATA1	0x40001382

			MX93_PAD_SD2_DATA2__USDHC2_DATA2	0x40001382

			MX93_PAD_SD2_DATA3__USDHC2_DATA3	0x40001382

			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e

		>;

	};



	/* need to config the SION for data and cmd pad, refer to ERR052021 */

	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {

		fsl,pins = <

			MX93_PAD_SD2_CLK__USDHC2_CLK		0x158e

			MX93_PAD_SD2_CMD__USDHC2_CMD		0x4000138e

			MX93_PAD_SD2_DATA0__USDHC2_DATA0	0x4000138e

			MX93_PAD_SD2_DATA1__USDHC2_DATA1	0x4000138e

			MX93_PAD_SD2_DATA2__USDHC2_DATA2	0x4000138e

			MX93_PAD_SD2_DATA3__USDHC2_DATA3	0x4000138e

			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e

		>;

	};



	/* need to config the SION for data and cmd pad, refer to ERR052021 */

	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {

		fsl,pins = <

			MX93_PAD_SD2_CLK__USDHC2_CLK		0x15fe

			MX93_PAD_SD2_CMD__USDHC2_CMD		0x400013fe

			MX93_PAD_SD2_DATA0__USDHC2_DATA0	0x400013fe

			MX93_PAD_SD2_DATA1__USDHC2_DATA1	0x400013fe

			MX93_PAD_SD2_DATA2__USDHC2_DATA2	0x400013fe

			MX93_PAD_SD2_DATA3__USDHC2_DATA3	0x400013fe

			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e

		>;

	};

};