Commit 05edd60f authored by Yu Jiaoliang's avatar Yu Jiaoliang Committed by Ulf Hansson
Browse files

mmc: host: Fix typos in comments across various files 



This patch corrects several typos in comments within the mmc/host
directory. No functional changes are introduced, only comment
improvements for better readability.

Detected using codespell.

Signed-off-by: default avatarYu Jiaoliang <yujiaoliang@vivo.com>
Reviewed-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20240929093418.526901-1-yujiaoliang@vivo.com


Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 5bb798cf

drivers/mmc/host/atmel-mci.c

+1 −1
Original line number Diff line number Diff line
@@ -860,7 +860,7 @@ static void atmci_send_stop_cmd(struct atmel_mci *host, struct mmc_data *data) 
}



/*

 * Configure given PDC buffer taking care of alignement issues.

 * Configure given PDC buffer taking care of alignment issues.

 * Update host->data_size and host->sg.

 */

static void atmci_pdc_set_single_buf(struct atmel_mci *host,

drivers/mmc/host/au1xmmc.c

+1 −1
Original line number Diff line number Diff line
@@ -543,7 +543,7 @@ static void au1xmmc_cmd_complete(struct au1xmmc_host *host, u32 status) 
					cmd->resp[i] |= (r[i + 1] & 0xFF000000) >> 24;

			}

		} else {

			/* Techincally, we should be getting all 48 bits of

			/* Technically, we should be getting all 48 bits of

			 * the response (SD_RESP1 + SD_RESP2), but because

			 * our response omits the CRC, our data ends up

			 * being shifted 8 bits to the right.  In this case,

drivers/mmc/host/cavium-octeon.c

+1 −1
Original line number Diff line number Diff line
@@ -217,7 +217,7 @@ static int octeon_mmc_probe(struct platform_device *pdev) 
		return PTR_ERR(base);

	host->dma_base = base;

	/*

	 * To keep the register addresses shared we intentionaly use

	 * To keep the register addresses shared we intentionally use

	 * a negative offset here, first register used on Octeon therefore

	 * starts at 0x20 (MIO_EMM_DMA_CFG).

	 */

drivers/mmc/host/dw_mmc.c

+1 −1
Original line number Diff line number Diff line
@@ -1182,7 +1182,7 @@ static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data) 
		/*

		 * Use the initial fifoth_val for PIO mode. If wm_algined

		 * is set, we set watermark same as data size.

		 * If next issued data may be transfered by DMA mode,

		 * If next issued data may be transferred by DMA mode,

		 * prev_blksz should be invalidated.

		 */

		if (host->wm_aligned)

drivers/mmc/host/meson-gx-mmc.c

+1 −1
Original line number Diff line number Diff line
@@ -879,7 +879,7 @@ static void meson_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) 
	/*

	 * The memory at the end of the controller used as bounce buffer for

	 * the dram_access_quirk only accepts 32bit read/write access,

	 * check the aligment and length of the data before starting the request.

	 * check the alignment and length of the data before starting the request.

	 */

	if (host->dram_access_quirk && mrq->data) {

		mrq->cmd->error = meson_mmc_validate_dram_access(mmc, mrq->data);