Commit 06c231fe authored by Christian Bruel's avatar Christian Bruel Committed by Arnd Bergmann
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arm64: dts: st: Use 128kB size for aliased GIC400 register access on stm32mp25 SoCs 



Adjust the size of 8kB GIC regions to 128kB so that each 4kB is mapped 16
times over a 64kB region.
The offset is then adjusted in the irq-gic driver.

see commit 12e14066 ("irqchip/GIC: Add workaround for aliased GIC400")

Fixes: 5d30d03a ("arm64: dts: st: introduce stm32mp25 SoCs family")
Suggested-by: default avatarMarc Zyngier <maz@kernel.org>
Signed-off-by: default avatarChristian Bruel <christian.bruel@foss.st.com>
Acked-by: default avatarMarc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20250415111654.2103767-3-christian.bruel@foss.st.com


Signed-off-by: default avatarAlexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent de2b2107

arch/arm64/boot/dts/st/stm32mp251.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -119,9 +119,9 @@ intc: interrupt-controller@4ac00000 { 
		#interrupt-cells = <3>;

		interrupt-controller;

		reg = <0x0 0x4ac10000 0x0 0x1000>,

		      <0x0 0x4ac20000 0x0 0x2000>,

		      <0x0 0x4ac40000 0x0 0x2000>,

		      <0x0 0x4ac60000 0x0 0x2000>;

		      <0x0 0x4ac20000 0x0 0x20000>,

		      <0x0 0x4ac40000 0x0 0x20000>,

		      <0x0 0x4ac60000 0x0 0x20000>;

	};



	psci {