Commit 07cc32ec authored by Jouni Högander's avatar Jouni Högander
Browse files

drm/panelreplay: Panel Replay capability DPCD register definitions



Add new definition for size of Panel Replay DPCD capability registers
area. Rename existing definitions to group capability registers together.

Signed-off-by: default avatarJouni Högander <jouni.hogander@intel.com>
Reviewed-by: default avatarAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Acked-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://lore.kernel.org/r/20250526120512.1702815-2-jouni.hogander@intel.com
parent 7ce53db1
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+4 −4
Original line number Diff line number Diff line
@@ -516,7 +516,7 @@ static u8 intel_dp_get_su_capability(struct intel_dp *intel_dp)

	if (intel_dp->psr.sink_panel_replay_su_support)
		drm_dp_dpcd_readb(&intel_dp->aux,
				  DP_PANEL_PANEL_REPLAY_CAPABILITY,
				  DP_PANEL_REPLAY_CAP_CAPABILITY,
				  &su_capability);
	else
		su_capability = intel_dp->psr_dpcd[1];
@@ -528,7 +528,7 @@ static unsigned int
intel_dp_get_su_x_granularity_offset(struct intel_dp *intel_dp)
{
	return intel_dp->psr.sink_panel_replay_su_support ?
		DP_PANEL_PANEL_REPLAY_X_GRANULARITY :
		DP_PANEL_REPLAY_CAP_X_GRANULARITY :
		DP_PSR2_SU_X_GRANULARITY;
}

@@ -536,7 +536,7 @@ static unsigned int
intel_dp_get_su_y_granularity_offset(struct intel_dp *intel_dp)
{
	return intel_dp->psr.sink_panel_replay_su_support ?
		DP_PANEL_PANEL_REPLAY_Y_GRANULARITY :
		DP_PANEL_REPLAY_CAP_Y_GRANULARITY :
		DP_PSR2_SU_Y_GRANULARITY;
}

@@ -676,7 +676,7 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
{
	drm_dp_dpcd_read(&intel_dp->aux, DP_PSR_SUPPORT, intel_dp->psr_dpcd,
			 sizeof(intel_dp->psr_dpcd));
	drm_dp_dpcd_readb(&intel_dp->aux, DP_PANEL_REPLAY_CAP,
	drm_dp_dpcd_readb(&intel_dp->aux, DP_PANEL_REPLAY_CAP_SUPPORT,
			  &intel_dp->pr_dpcd);

	if (intel_dp->pr_dpcd & DP_PANEL_REPLAY_SUPPORT)
+7 −5
Original line number Diff line number Diff line
@@ -547,16 +547,18 @@
/* DFP Capability Extension */
#define DP_DFP_CAPABILITY_EXTENSION_SUPPORT	0x0a3	/* 2.0 */

#define DP_PANEL_REPLAY_CAP				0x0b0  /* DP 2.0 */
#define DP_PANEL_REPLAY_CAP_SUPPORT			0x0b0  /* DP 2.0 */
# define DP_PANEL_REPLAY_SUPPORT			(1 << 0)
# define DP_PANEL_REPLAY_SU_SUPPORT			(1 << 1)
# define DP_PANEL_REPLAY_EARLY_TRANSPORT_SUPPORT	(1 << 2) /* eDP 1.5 */

#define DP_PANEL_PANEL_REPLAY_CAPABILITY		0xb1
# define DP_PANEL_PANEL_REPLAY_SU_GRANULARITY_REQUIRED	(1 << 5)
#define DP_PANEL_REPLAY_CAP_SIZE	7

#define DP_PANEL_PANEL_REPLAY_X_GRANULARITY		0xb2
#define DP_PANEL_PANEL_REPLAY_Y_GRANULARITY		0xb4
#define DP_PANEL_REPLAY_CAP_CAPABILITY			0xb1
# define DP_PANEL_REPLAY_SU_GRANULARITY_REQUIRED	(1 << 5)

#define DP_PANEL_REPLAY_CAP_X_GRANULARITY		0xb2
#define DP_PANEL_REPLAY_CAP_Y_GRANULARITY		0xb4

/* Link Configuration */
#define	DP_LINK_BW_SET		            0x100