Commit 08cbe68d authored by Dillon Varone's avatar Dillon Varone Committed by Alex Deucher
Browse files

drm/amd/display: Export additional FAMS2 global configuration options from DML 



[WHY&HOW]
Some global configuration options were previously hardcoded in DC, now they are
exported by DML and sent to FW.

Reviewed-by: default avatarMartin Leung <martin.leung@amd.com>
Signed-off-by: default avatarJerry Zuo <jerry.zuo@amd.com>
Signed-off-by: default avatarDillon Varone <dillon.varone@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b8d3782d

drivers/gpu/drm/amd/display/dc/core/dc_state.c

+2 −2
Original line number Diff line number Diff line
@@ -967,10 +967,10 @@ bool dc_state_is_fams2_in_use( 
	bool is_fams2_in_use = false;



	if (state)

		is_fams2_in_use |= state->bw_ctx.bw.dcn.fams2_stream_count > 0;

		is_fams2_in_use |= state->bw_ctx.bw.dcn.fams2_global_config.features.bits.enable;



	if (dc->current_state)

		is_fams2_in_use |= dc->current_state->bw_ctx.bw.dcn.fams2_stream_count > 0;

		is_fams2_in_use |= dc->current_state->bw_ctx.bw.dcn.fams2_global_config.features.bits.enable;



	return is_fams2_in_use;

}

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

+16 −18
Original line number Diff line number Diff line
@@ -1672,22 +1672,17 @@ void dc_dmub_srv_fams2_update_config(struct dc *dc, 
	global_cmd->header.sub_type = DMUB_CMD__FAMS2_CONFIG;

	global_cmd->header.payload_bytes = sizeof(struct dmub_rb_cmd_fams2) - sizeof(struct dmub_cmd_header);



	if (enable) {

		/* send global configuration parameters */

	global_cmd->config.global.max_allow_delay_us = 100 * 1000; //100ms

	global_cmd->config.global.lock_wait_time_us = 5000; //5ms

	global_cmd->config.global.recovery_timeout_us = 5000; //5ms

	global_cmd->config.global.hwfq_flip_programming_delay_us = 100; //100us



	/* copy static feature configuration */

	global_cmd->config.global.features.all = dc->debug.fams2_config.all;

		memcpy(&global_cmd->config.global, &context->bw_ctx.bw.dcn.fams2_global_config, sizeof(struct dmub_cmd_fams2_global_config));



	/* apply feature configuration based on current driver state */

	global_cmd->config.global.features.bits.enable_visual_confirm = dc->debug.visual_confirm == VISUAL_CONFIRM_FAMS2;

	global_cmd->config.global.features.bits.enable = enable;

		/* copy static feature configuration overrides */

		global_cmd->config.global.features.bits.enable_stall_recovery = dc->debug.fams2_config.bits.enable_stall_recovery;

		global_cmd->config.global.features.bits.enable_debug = dc->debug.fams2_config.bits.enable_debug;

		global_cmd->config.global.features.bits.enable_offload_flip = dc->debug.fams2_config.bits.enable_offload_flip;



		/* construct per-stream configs */

	if (enable) {

		for (i = 0; i < context->bw_ctx.bw.dcn.fams2_stream_count; i++) {

		for (i = 0; i < context->bw_ctx.bw.dcn.fams2_global_config.num_streams; i++) {

			struct dmub_rb_cmd_fams2 *stream_cmd = &cmd[i+1].fams2_config;



			/* configure command header */
@@ -1702,12 +1697,15 @@ void dc_dmub_srv_fams2_update_config(struct dc *dc, 
		}

	}



	if (enable && context->bw_ctx.bw.dcn.fams2_stream_count) {

	/* apply feature configuration based on current driver state */

	global_cmd->config.global.features.bits.enable_visual_confirm = dc->debug.visual_confirm == VISUAL_CONFIRM_FAMS2;

	global_cmd->config.global.features.bits.enable = enable;



	if (enable && context->bw_ctx.bw.dcn.fams2_global_config.features.bits.enable) {

		/* set multi pending for global, and unset for last stream cmd */

		global_cmd->config.global.num_streams = context->bw_ctx.bw.dcn.fams2_stream_count;

		global_cmd->header.multi_cmd_pending = 1;

		cmd[context->bw_ctx.bw.dcn.fams2_stream_count].fams2_config.header.multi_cmd_pending = 0;

		num_cmds += context->bw_ctx.bw.dcn.fams2_stream_count;

		cmd[context->bw_ctx.bw.dcn.fams2_global_config.num_streams].fams2_config.header.multi_cmd_pending = 0;

		num_cmds += context->bw_ctx.bw.dcn.fams2_global_config.num_streams;

	}



	dm_execute_dmub_cmd_list(dc->ctx, num_cmds, cmd, DM_DMUB_WAIT_TYPE_WAIT);

drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_utils.c

+76 −67
Original line number Diff line number Diff line
@@ -461,20 +461,19 @@ void dml21_build_fams2_programming(const struct dc *dc, 
		struct dml2_context *dml_ctx)

{

	int i, j, k;

	unsigned int num_fams2_streams = 0;



	/* reset fams2 data */

	context->bw_ctx.bw.dcn.fams2_stream_count = 0;

	memset(&context->bw_ctx.bw.dcn.fams2_stream_params, 0, sizeof(struct dmub_fams2_stream_static_state) * DML2_MAX_PLANES);

	memset(&context->bw_ctx.bw.dcn.fams2_global_config, 0, sizeof(struct dmub_cmd_fams2_global_config));



	if (!dml_ctx->v21.mode_programming.programming->fams2_required)

		return;



	if (dml_ctx->v21.mode_programming.programming->fams2_required) {

		for (i = 0; i < context->stream_count; i++) {

			int dml_stream_idx;

			struct dc_stream_state *phantom_stream;

			struct dc_stream_status *phantom_status;



		struct dmub_fams2_stream_static_state *static_state = &context->bw_ctx.bw.dcn.fams2_stream_params[context->bw_ctx.bw.dcn.fams2_stream_count];

			struct dmub_fams2_stream_static_state *static_state = &context->bw_ctx.bw.dcn.fams2_stream_params[num_fams2_streams];



			struct dc_stream_state *stream = context->streams[i];
@@ -545,10 +544,20 @@ void dml21_build_fams2_programming(const struct dc *dc, 
				break;

			}



		context->bw_ctx.bw.dcn.fams2_stream_count++;

			num_fams2_streams++;

		}

	}



	if (num_fams2_streams > 0) {

		/* copy FAMS2 configuration */

		memcpy(&context->bw_ctx.bw.dcn.fams2_global_config,

				&dml_ctx->v21.mode_programming.programming->fams2_global_config,

				sizeof(struct dmub_cmd_fams2_global_config));



		context->bw_ctx.bw.dcn.fams2_global_config.num_streams = num_fams2_streams;

	}



	context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching = context->bw_ctx.bw.dcn.fams2_stream_count > 0;

	context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching = context->bw_ctx.bw.dcn.fams2_global_config.features.bits.enable;

}



bool dml21_is_plane1_enabled(enum dml2_source_format_class source_format)

drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.c

+1 −0
Original line number Diff line number Diff line
@@ -351,6 +351,7 @@ static void pack_mode_programming_params_with_implicit_subvp(struct dml2_core_in 
		programming->fams2_required = display_cfg->stage3.fams2_required;



		dml2_core_calcs_get_global_fams2_programming(&core->clean_me_up.mode_lib, display_cfg, &programming->fams2_global_config);

		programming->fams2_global_config.features.bits.enable = display_cfg->stage3.fams2_required;

	}



	// Only loop over all the main streams (the implicit svp streams will be packed as part of the main stream)

drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c

+12 −5
Original line number Diff line number Diff line
@@ -12221,6 +12221,12 @@ void dml2_core_calcs_get_global_fams2_programming(const struct dml2_core_interna 
		const struct display_configuation_with_meta *display_cfg,

		struct dmub_cmd_fams2_global_config *fams2_global_config)

{

	fams2_global_config->features.bits.enable = display_cfg->stage3.fams2_required;









	if (fams2_global_config->features.bits.enable) {









		fams2_global_config->features.bits.enable_stall_recovery = true;









		fams2_global_config->features.bits.allow_delay_check_mode = FAMS2_ALLOW_DELAY_CHECK_FROM_START;

















		fams2_global_config->max_allow_delay_us = mode_lib->ip_caps.fams2.max_allow_delay_us;









		fams2_global_config->lock_wait_time_us = mode_lib->ip_caps.fams2.lock_timeout_us;









		fams2_global_config->recovery_timeout_us = mode_lib->ip_caps.fams2.recovery_timeout_us;








@@ -12228,6 +12234,7 @@ void dml2_core_calcs_get_global_fams2_programming(const struct dml2_core_interna















		fams2_global_config->num_streams = display_cfg->display_config.num_streams;









	}









}

















void dml2_core_calcs_get_stream_fams2_programming(const struct dml2_core_internal_display_mode_lib *mode_lib,









		const struct display_configuation_with_meta *display_cfg,