Unverified Commit 09976070 authored by Gabriel Fernandez's avatar Gabriel Fernandez Committed by Stephen Boyd
Browse files

dt-bindings: stm32: cosmetic fixes for STM32MP25 clock and reset bindings 



- drop minItems from access-controllers
- remove rcc label from example
- fixes typos
- remove double '::' from 'See also::'

Acked-by: default avatarConor Dooley <conor.dooley@microchip.com>
Signed-off-by: default avatarGabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 37ae8501

Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml

+6 −7
Original line number Diff line number Diff line
@@ -11,9 +11,9 @@ maintainers: 


description: |

  The RCC hardware block is both a reset and a clock controller.

  RCC makes also power management (resume/supend).

  RCC makes also power management (resume/suspend).



  See also::

  See also:

    include/dt-bindings/clock/st,stm32mp25-rcc.h

    include/dt-bindings/reset/st,stm32mp25-rcc.h
@@ -38,7 +38,7 @@ properties: 
      - description: CK_SCMI_MSI Low Power Internal oscillator (~ 4 MHz or ~ 16 MHz)

      - description: CK_SCMI_LSE Low Speed External oscillator (32 KHz)

      - description: CK_SCMI_LSI Low Speed Internal oscillator (~ 32 KHz)

      - description: CK_SCMI_HSE_DIV2 CK_SCMI_HSE divided by 2 (coud be gated)

      - description: CK_SCMI_HSE_DIV2 CK_SCMI_HSE divided by 2 (could be gated)

      - description: CK_SCMI_ICN_HS_MCU High Speed interconnect bus clock

      - description: CK_SCMI_ICN_LS_MCU Low Speed interconnect bus clock

      - description: CK_SCMI_ICN_SDMMC SDMMC interconnect bus clock
@@ -108,15 +108,14 @@ properties: 
      - description: CK_SCMI_ICN_APB2 Peripheral bridge 2

      - description: CK_SCMI_ICN_APB3 Peripheral bridge 3

      - description: CK_SCMI_ICN_APB4 Peripheral bridge 4

      - description: CK_SCMI_ICN_APBDBG Peripheral bridge for degub

      - description: CK_SCMI_ICN_APBDBG Peripheral bridge for debug

      - description: CK_SCMI_TIMG1 Peripheral bridge for timer1

      - description: CK_SCMI_TIMG2 Peripheral bridge for timer2

      - description: CK_SCMI_PLL3 PLL3 clock

      - description: clk_dsi_txbyte DSI byte clock



  access-controllers:

    minItems: 1

    maxItems: 2

    maxItems: 1



required:

  - compatible
@@ -131,7 +130,7 @@ examples: 
  - |

    #include <dt-bindings/clock/st,stm32mp25-rcc.h>



    rcc: clock-controller@44200000 {

    clock-controller@44200000 {

        compatible = "st,stm32mp25-rcc";

        reg = <0x44200000 0x10000>;

        #clock-cells = <1>;