Commit 09bb926d authored by Sean Christopherson's avatar Sean Christopherson
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KVM: selftests: Return a value from vcpu_get_reg() instead of using an out-param



Return a uint64_t from vcpu_get_reg() instead of having the caller provide
a pointer to storage, as none of the vcpu_get_reg() usage in KVM selftests
accesses a register larger than 64 bits, and vcpu_set_reg() only accepts a
64-bit value.  If a use case comes along that needs to get a register that
is larger than 64 bits, then a utility can be added to assert success and
take a void pointer, but until then, forcing an out param yields ugly code
and prevents feeding the output of vcpu_get_reg() into vcpu_set_reg().

Reviewed-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Acked-by: default avatarClaudio Imbrenda <imbrenda@linux.ibm.com>
Link: https://lore.kernel.org/r/20241128005547.4077116-3-seanjc@google.com


Signed-off-by: default avatarSean Christopherson <seanjc@google.com>
parent 915d2f07
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+5 −5
Original line number Diff line number Diff line
@@ -97,7 +97,7 @@ static void test_user_raz_wi(struct kvm_vcpu *vcpu)
		uint64_t reg_id = raz_wi_reg_ids[i];
		uint64_t val;

		vcpu_get_reg(vcpu, reg_id, &val);
		val = vcpu_get_reg(vcpu, reg_id);
		TEST_ASSERT_EQ(val, 0);

		/*
@@ -106,7 +106,7 @@ static void test_user_raz_wi(struct kvm_vcpu *vcpu)
		 */
		vcpu_set_reg(vcpu, reg_id, BAD_ID_REG_VAL);

		vcpu_get_reg(vcpu, reg_id, &val);
		val = vcpu_get_reg(vcpu, reg_id);
		TEST_ASSERT_EQ(val, 0);
	}
}
@@ -126,14 +126,14 @@ static void test_user_raz_invariant(struct kvm_vcpu *vcpu)
		uint64_t reg_id = raz_invariant_reg_ids[i];
		uint64_t val;

		vcpu_get_reg(vcpu, reg_id, &val);
		val = vcpu_get_reg(vcpu, reg_id);
		TEST_ASSERT_EQ(val, 0);

		r = __vcpu_set_reg(vcpu, reg_id, BAD_ID_REG_VAL);
		TEST_ASSERT(r < 0 && errno == EINVAL,
			    "unexpected KVM_SET_ONE_REG error: r=%d, errno=%d", r, errno);

		vcpu_get_reg(vcpu, reg_id, &val);
		val = vcpu_get_reg(vcpu, reg_id);
		TEST_ASSERT_EQ(val, 0);
	}
}
@@ -144,7 +144,7 @@ static bool vcpu_aarch64_only(struct kvm_vcpu *vcpu)
{
	uint64_t val, el0;

	vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_ID_AA64PFR0_EL1), &val);
	val = vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_ID_AA64PFR0_EL1));

	el0 = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_EL0), val);
	return el0 == ID_AA64PFR0_EL1_ELx_64BIT_ONLY;
+2 −2
Original line number Diff line number Diff line
@@ -501,7 +501,7 @@ void test_single_step_from_userspace(int test_cnt)
		TEST_ASSERT(ss_enable, "Unexpected KVM_EXIT_DEBUG");

		/* Check if the current pc is expected. */
		vcpu_get_reg(vcpu, ARM64_CORE_REG(regs.pc), &pc);
		pc = vcpu_get_reg(vcpu, ARM64_CORE_REG(regs.pc));
		TEST_ASSERT(!test_pc || pc == test_pc,
			    "Unexpected pc 0x%lx (expected 0x%lx)",
			    pc, test_pc);
@@ -583,7 +583,7 @@ int main(int argc, char *argv[])
	uint64_t aa64dfr0;

	vm = vm_create_with_one_vcpu(&vcpu, guest_code);
	vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_ID_AA64DFR0_EL1), &aa64dfr0);
	aa64dfr0 = vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_ID_AA64DFR0_EL1));
	__TEST_REQUIRE(debug_version(aa64dfr0) >= 6,
		       "Armv8 debug architecture not supported.");
	kvm_vm_free(vm);
+3 −3
Original line number Diff line number Diff line
@@ -173,7 +173,7 @@ static void test_fw_regs_before_vm_start(struct kvm_vcpu *vcpu)
		const struct kvm_fw_reg_info *reg_info = &fw_reg_info[i];

		/* First 'read' should be an upper limit of the features supported */
		vcpu_get_reg(vcpu, reg_info->reg, &val);
		val = vcpu_get_reg(vcpu, reg_info->reg);
		TEST_ASSERT(val == FW_REG_ULIMIT_VAL(reg_info->max_feat_bit),
			"Expected all the features to be set for reg: 0x%lx; expected: 0x%lx; read: 0x%lx",
			reg_info->reg, FW_REG_ULIMIT_VAL(reg_info->max_feat_bit), val);
@@ -184,7 +184,7 @@ static void test_fw_regs_before_vm_start(struct kvm_vcpu *vcpu)
			"Failed to clear all the features of reg: 0x%lx; ret: %d",
			reg_info->reg, errno);

		vcpu_get_reg(vcpu, reg_info->reg, &val);
		val = vcpu_get_reg(vcpu, reg_info->reg);
		TEST_ASSERT(val == 0,
			"Expected all the features to be cleared for reg: 0x%lx", reg_info->reg);

@@ -214,7 +214,7 @@ static void test_fw_regs_after_vm_start(struct kvm_vcpu *vcpu)
		 * Before starting the VM, the test clears all the bits.
		 * Check if that's still the case.
		 */
		vcpu_get_reg(vcpu, reg_info->reg, &val);
		val = vcpu_get_reg(vcpu, reg_info->reg);
		TEST_ASSERT(val == 0,
			"Expected all the features to be cleared for reg: 0x%lx",
			reg_info->reg);
+1 −1
Original line number Diff line number Diff line
@@ -164,7 +164,7 @@ int main(int argc, char *argv[])
	uint64_t pfr0;

	vm = vm_create_with_one_vcpu(&vcpu, NULL);
	vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_ID_AA64PFR0_EL1), &pfr0);
	pfr0 = vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_ID_AA64PFR0_EL1));
	__TEST_REQUIRE(FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_GIC), pfr0),
		       "GICv3 not supported.");
	kvm_vm_free(vm);
+4 −4
Original line number Diff line number Diff line
@@ -111,8 +111,8 @@ static void assert_vcpu_reset(struct kvm_vcpu *vcpu)
{
	uint64_t obs_pc, obs_x0;

	vcpu_get_reg(vcpu, ARM64_CORE_REG(regs.pc), &obs_pc);
	vcpu_get_reg(vcpu, ARM64_CORE_REG(regs.regs[0]), &obs_x0);
	obs_pc = vcpu_get_reg(vcpu, ARM64_CORE_REG(regs.pc));
	obs_x0 = vcpu_get_reg(vcpu, ARM64_CORE_REG(regs.regs[0]));

	TEST_ASSERT(obs_pc == CPU_ON_ENTRY_ADDR,
		    "unexpected target cpu pc: %lx (expected: %lx)",
@@ -152,7 +152,7 @@ static void host_test_cpu_on(void)
	 */
	vcpu_power_off(target);

	vcpu_get_reg(target, KVM_ARM64_SYS_REG(SYS_MPIDR_EL1), &target_mpidr);
	target_mpidr = vcpu_get_reg(target, KVM_ARM64_SYS_REG(SYS_MPIDR_EL1));
	vcpu_args_set(source, 1, target_mpidr & MPIDR_HWID_BITMASK);
	enter_guest(source);

@@ -244,7 +244,7 @@ static void host_test_system_off2(void)

	setup_vm(guest_test_system_off2, &source, &target);

	vcpu_get_reg(target, KVM_REG_ARM_PSCI_VERSION, &psci_version);
	psci_version = vcpu_get_reg(target, KVM_REG_ARM_PSCI_VERSION);

	TEST_ASSERT(psci_version >= PSCI_VERSION(1, 3),
		    "Unexpected PSCI version %lu.%lu",
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