Commit 0ce9a5ff authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull phy updates from Vinod Koul:
 "New hardware support:

   - ST STM32MP25 combophy support

   - Sparx5 support for lan969x serdes and updates to driver to support
     this

   - NXP PTN3222 eUSB2 to USB2 redriver

   - Qualcomm SAR2130P eusb2 support, QCS8300 USB DW3 and QMP USB2
     support, X1E80100 QMP PCIe PHY Gen4 support, QCS615 and QCS8300 QMP
     UFS PHY support and SA8775P eDP PHY support

   - Rockchip rk3576 usbdp and rk3576 usb2 phy support

   - Binding for Microchip ATA6561 can phy

  Updates:

   - Freescale driver updates from hdmi support

   - Conversion of rockchip rk3228 hdmi phy binding to yaml

   - Broadcom usb2-phy deprecated support dropped and USB init array
     update for BCM4908

   - TI USXGMII mode support in J7200

   - Switch back to platform_driver::remove() subsystem update"

* tag 'phy-for-6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (59 commits)
  phy: qcom: qmp: Fix lecacy-legacy typo
  phy: lan969x-serdes: add support for lan969x serdes driver
  dt-bindings: phy: sparx5: document lan969x
  phy: sparx5-serdes: add support for branching on chip type
  phy: sparx5-serdes: add indirection layer to register macros
  phy: sparx5-serdes: add function for getting the CMU index
  phy: sparx5-serdes: add ops to match data
  phy: sparx5-serdes: add constant for the number of CMU's
  phy: sparx5-serdes: add constants to match data
  phy: sparx5-serdes: add support for private match data
  phy: bcm-ns-usb2: drop support for old binding variant
  dt-bindings: phy: bcm-ns-usb2-phy: drop deprecated variant
  dt-bindings: phy: Add QMP UFS PHY compatible for QCS8300
  dt-bindings: phy: qcom: snps-eusb2: Add SAR2130P compatible
  dt-bindings: phy: ti,tcan104x-can: Document Microchip ATA6561
  phy: airoha: Fix REG_CSR_2L_RX{0,1}_REV0 definitions
  phy: airoha: Fix REG_CSR_2L_JCPLL_SDM_HREN config in airoha_pcie_phy_init_ssc_jcpll()
  phy: airoha: Fix REG_PCIE_PMA_TX_RESET config in airoha_pcie_phy_init_csr_2l()
  phy: airoha: Fix REG_CSR_2L_PLL_CMN_RESERVE0 config in airoha_pcie_phy_init_clk_out()
  phy: phy-rockchip-samsung-hdptx: Don't request RST_PHY/RST_ROPLL/RST_LCPLL
  ...
parents 7536c1a5 32f4a76b
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+3 −16
Original line number Diff line number Diff line
@@ -18,16 +18,8 @@ properties:
    const: brcm,ns-usb2-phy

  reg:
    anyOf:
      - maxItems: 1
    maxItems: 1
    description: PHY control register
      - maxItems: 1
        description: iomem address range of DMU (Device Management Unit)
        deprecated: true

  reg-names:
    items:
      - const: dmu

  brcm,syscon-clkset:
    description: phandle to syscon for clkset register
@@ -50,12 +42,7 @@ required:
  - clocks
  - clock-names
  - "#phy-cells"

oneOf:
  - required:
  - brcm,syscon-clkset
  - required:
      - reg-names

additionalProperties: false

+1 −0
Original line number Diff line number Diff line
@@ -32,6 +32,7 @@ properties:
          - enum:
              - fsl,imx8dxl-usbphy
              - fsl,imx8qm-usbphy
              - fsl,imx8qxp-usbphy
              - fsl,imx8ulp-usbphy
          - const: fsl,imx7ulp-usbphy

+10 −0
Original line number Diff line number Diff line
@@ -125,6 +125,16 @@ properties:
    $ref: /schemas/types.yaml#/definitions/uint32
    default: 28

  power-domains:
    description:
      The TPHY of MediaTek should exist within a power domain. The
      developer should be aware that the hardware design of MediaTek TPHY
      does not require the addition of MTCMOS. If the power to the TPHY
      is turned off, it will impact other functions. From the current
      perspective of USB hardware design, even if MTCMOS is added to the
      TPHY, it should remain always on.
    maxItems: 1

# Required child node:
patternProperties:
  "^(usb|pcie|sata)-phy@[0-9a-f]+$":
+16 −1
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ title: Microchip Sparx5 Serdes controller

maintainers:
  - Steen Hegelund <steen.hegelund@microchip.com>
  - Daniel Machon <daniel.machon@microchip.com>

description: |
  The Sparx5 SERDES interfaces share the same basic functionality, but
@@ -62,12 +63,26 @@ description: |
  * 10.3125 Gbps (10GBASE-R/10GBASE-KR/USXGMII)
  * 25.78125 Gbps (25GBASE-KR/25GBASE-CR/25GBASE-SR/25GBASE-LR/25GBASE-ER)

  lan969x has ten SERDES10G interfaces that share the same features, operating
  modes and data rates as the equivalent Sparx5 SERDES10G interfaces.

properties:
  $nodename:
    pattern: "^serdes@[0-9a-f]+$"

  compatible:
    const: microchip,sparx5-serdes
    oneOf:
      - enum:
          - microchip,sparx5-serdes
          - microchip,lan9691-serdes
      - items:
          - enum:
              - microchip,lan9698-serdes
              - microchip,lan9696-serdes
              - microchip,lan9694-serdes
              - microchip,lan9693-serdes
              - microchip,lan9692-serdes
          - const: microchip,lan9691-serdes

  reg:
    minItems: 1
+55 −0
Original line number Diff line number Diff line
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/nxp,ptn3222.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NXP PTN3222 1-port eUSB2 to USB2 redriver

maintainers:
  - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

properties:
  compatible:
    enum:
      - nxp,ptn3222

  reg:
    maxItems: 1

  "#phy-cells":
    const: 0

  vdd1v8-supply:
    description: power supply (1.8V)

  vdd3v3-supply:
    description: power supply (3.3V)

  reset-gpios: true

required:
  - compatible
  - reg
  - '#phy-cells'

additionalProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>

    i2c {
        #address-cells = <1>;
        #size-cells = <0>;

        redriver@4f {
            compatible = "nxp,ptn3222";
            reg = <0x4f>;
            #phy-cells = <0>;
            vdd3v3-supply = <&vreg_3p3>;
            vdd1v8-supply = <&vreg_1p8>;
            reset-gpios = <&gpio_reset GPIO_ACTIVE_LOW>;
        };
    };
...
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