Commit 0d1fac6d authored by Stephan Gerhold's avatar Stephan Gerhold Committed by Jakub Kicinski
Browse files

net: wwan: mhi_wwan_mbim: Silence sequence number glitch errors 

When using the Qualcomm X55 modem on the ThinkPad X13s, the kernel log is
constantly being filled with errors related to a "sequence number glitch",
e.g.:

	[ 1903.284538] sequence number glitch prev=16 curr=0
	[ 1913.812205] sequence number glitch prev=50 curr=0
	[ 1923.698219] sequence number glitch prev=142 curr=0
	[ 2029.248276] sequence number glitch prev=1555 curr=0
	[ 2046.333059] sequence number glitch prev=70 curr=0
	[ 2076.520067] sequence number glitch prev=272 curr=0
	[ 2158.704202] sequence number glitch prev=2655 curr=0
	[ 2218.530776] sequence number glitch prev=2349 curr=0
	[ 2225.579092] sequence number glitch prev=6 curr=0

Internet connectivity is working fine, so this error seems harmless. It
looks like modem does not preserve the sequence number when entering low
power state; the amount of errors depends on how actively the modem is
being used.

A similar issue has also been seen on USB-based MBIM modems [1]. However,
in cdc_ncm.c the "sequence number glitch" message is a debug message
instead of an error. Apply the same to the mhi_wwan_mbim.c driver to
silence these errors when using the modem.

[1]: https://lists.freedesktop.org/archives/libmbim-devel/2016-November/000781.html



Signed-off-by: default avatarStephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: default avatarLoic Poulain <loic.poulain@linaro.org>
Acked-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://patch.msgid.link/20250212-mhi-wwan-mbim-sequence-glitch-v1-1-503735977cbd@linaro.org


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 054e61bb

drivers/net/wwan/mhi_wwan_mbim.c

+1 −1
Original line number Diff line number Diff line
@@ -220,7 +220,7 @@ static int mbim_rx_verify_nth16(struct mhi_mbim_context *mbim, struct sk_buff *s 
	if (mbim->rx_seq + 1 != le16_to_cpu(nth16->wSequence) &&

	    (mbim->rx_seq || le16_to_cpu(nth16->wSequence)) &&

	    !(mbim->rx_seq == 0xffff && !le16_to_cpu(nth16->wSequence))) {

		net_err_ratelimited("sequence number glitch prev=%d curr=%d\n",

		net_dbg_ratelimited("sequence number glitch prev=%d curr=%d\n",

				    mbim->rx_seq, le16_to_cpu(nth16->wSequence));

	}

	mbim->rx_seq = le16_to_cpu(nth16->wSequence);