Commit 0d8cf0c9 authored by Lucas De Marchi's avatar Lucas De Marchi
Browse files

drm/xe: Fix END redefinition 



mips declares an END macro in its headers so it can't be used without
namespace in a driver like xe.

Instead of coming up with a longer name, just remove the macro and
replace its use with 0 since it's still clear what that means:
set_offsets() was already using that implicitly when checking the data
variable.

Reported-by: default avatarGuenter Roeck <linux@roeck-us.net>
Closes: http://kisskb.ellerman.id.au/kisskb/buildresult/15143996/


Tested-by: default avatarGuenter Roeck <linux@roeck-us.net>
Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240322145037.196548-1-lucas.demarchi@intel.com


Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
(cherry picked from commit 35b22649)
Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
parent 45c30b29

drivers/gpu/drm/xe/xe_lrc.c

+9 −11
Original line number Diff line number Diff line
@@ -97,7 +97,6 @@ static void set_offsets(u32 *regs, 
#define REG16(x) \

	(((x) >> 9) | BIT(7) | BUILD_BUG_ON_ZERO(x >= 0x10000)), \

	(((x) >> 2) & 0x7f)

#define END 0

{

	const u32 base = hwe->mmio_base;
@@ -168,7 +167,7 @@ static const u8 gen12_xcs_offsets[] = { 
	REG16(0x274),

	REG16(0x270),



	END

	0

};



static const u8 dg2_xcs_offsets[] = {
@@ -202,7 +201,7 @@ static const u8 dg2_xcs_offsets[] = { 
	REG16(0x274),

	REG16(0x270),



	END

	0

};



static const u8 gen12_rcs_offsets[] = {
@@ -298,7 +297,7 @@ static const u8 gen12_rcs_offsets[] = { 
	REG(0x084),

	NOP(1),



	END

	0

};



static const u8 xehp_rcs_offsets[] = {
@@ -339,7 +338,7 @@ static const u8 xehp_rcs_offsets[] = { 
	LRI(1, 0),

	REG(0x0c8),



	END

	0

};



static const u8 dg2_rcs_offsets[] = {
@@ -382,7 +381,7 @@ static const u8 dg2_rcs_offsets[] = { 
	LRI(1, 0),

	REG(0x0c8),



	END

	0

};



static const u8 mtl_rcs_offsets[] = {
@@ -425,7 +424,7 @@ static const u8 mtl_rcs_offsets[] = { 
	LRI(1, 0),

	REG(0x0c8),



	END

	0

};



#define XE2_CTX_COMMON \
@@ -471,7 +470,7 @@ static const u8 xe2_rcs_offsets[] = { 
	LRI(1, 0),              /* [0x47] */

	REG(0x0c8),             /* [0x48] R_PWR_CLK_STATE */



	END

	0

};



static const u8 xe2_bcs_offsets[] = {
@@ -482,16 +481,15 @@ static const u8 xe2_bcs_offsets[] = { 
	REG16(0x200),           /* [0x42] BCS_SWCTRL */

	REG16(0x204),           /* [0x44] BLIT_CCTL */



	END

	0

};



static const u8 xe2_xcs_offsets[] = {

	XE2_CTX_COMMON,



	END

	0

};



#undef END

#undef REG16

#undef REG

#undef LRI