Unverified Commit 0dc89a25 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'renesas-dts-for-v6.17-tag1' of... 

Merge tag 'renesas-dts-for-v6.17-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DTS updates for v6.17

  - Add SPI FLASH, camera, and Ethernet support on the RZ/G3E SoC and/or
    the RZ/G3E SoM and SMARC Carrier-II EVK development board,
  - Add Ethernet, USB2, and PMIC support on the RZ/V2H and RZ/V2N SoCs
    and EVK boards,
  - Add timer, I2C, watchdog, and GPU support on the RZ/V2N SoC and the
    RZ/V2N EVK board,
  - Add debug LED support for the RZN1D-DB development board,
  - Improve PCIe clock description on the Retronix Sparrow Hawk board,
  - Miscellaneous fixes and improvements.

* tag 'renesas-dts-for-v6.17-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (34 commits)
  arm64: dts: renesas: r9a09g047: Add GBETH nodes
  arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Rename fixed regulator node names
  arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Add RAA215300 PMIC
  arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Add RAA215300 PMIC
  arm64: dts: renesas: rcar-gen3: Add bootph-all to sysinfo EEPROMs
  arm64: dts: renesas: sparrow-hawk: Describe split PCIe clock
  arm64: dts: renesas: r8a779g0: Describe PCIe root ports
  arm64: dts: renesas: ebisu: Add CAN0 support
  ARM: dts: renesas: r9a06g032: Add second clock input to RTC
  arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable USB2.0 support
  arm64: dts: renesas: r9a09g056: Add USB2.0 support
  arm64: dts: renesas: r8a779g3-sparrow-hawk: Sort DTS
  ARM: dts: renesas: r9a06g032-rzn1d400-db: Describe debug LEDs
  arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable USB2.0 support
  PCI/pwrctrl: Add optional slot clock for PCI slots
  arm64: dts: renesas: r9a09g057: Add USB2.0 support
  arm64: dts: renesas: r9a09g047e57-smarc: Enable CRU, CSI support
  arm64: dts: renesas: renesas-smarc2: Enable I2C0 node
  arm64: dts: renesas: r9a09g047e57-smarc: Add I2C0 pincontrol
  arm64: dts: renesas: r9a09g047: Add CRU, CSI2 nodes
  ...

Link: https://lore.kernel.org/r/cover.1751026664.git.geert+renesas@glider.be


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 3e0111b6 41ffbb1c

arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts

+64 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ 


#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/input/input.h>

#include <dt-bindings/leds/common.h>

#include <dt-bindings/net/pcs-rzn1-miic.h>

#include <dt-bindings/pinctrl/rzn1-pinctrl.h>
@@ -86,7 +87,66 @@ switch-8 { 
			debounce-interval = <20>;

			gpios = <&pca9698 15 GPIO_ACTIVE_LOW>;

		};

	};



	leds {

		compatible = "gpio-leds";



		led-dbg0 {

			gpios = <&pca9698 0 GPIO_ACTIVE_HIGH>;

			color = <LED_COLOR_ID_GREEN>;

			function = LED_FUNCTION_DEBUG;

			function-enumerator = <0>;

		};



		led-dbg1 {

			gpios = <&pca9698 1 GPIO_ACTIVE_HIGH>;

			color = <LED_COLOR_ID_GREEN>;

			function = LED_FUNCTION_DEBUG;

			function-enumerator = <1>;

		};



		led-dbg2 {

			gpios = <&pca9698 2 GPIO_ACTIVE_HIGH>;

			color = <LED_COLOR_ID_GREEN>;

			function = LED_FUNCTION_DEBUG;

			function-enumerator = <2>;

		};



		led-dbg3 {

			gpios = <&pca9698 3 GPIO_ACTIVE_HIGH>;

			color = <LED_COLOR_ID_GREEN>;

			function = LED_FUNCTION_DEBUG;

			function-enumerator = <3>;

		};



		led-dbg4 {

			gpios = <&pca9698 4 GPIO_ACTIVE_HIGH>;

			color = <LED_COLOR_ID_GREEN>;

			function = LED_FUNCTION_DEBUG;

			function-enumerator = <4>;

		};



		led-dbg5 {

			gpios = <&pca9698 5 GPIO_ACTIVE_HIGH>;

			color = <LED_COLOR_ID_GREEN>;

			function = LED_FUNCTION_DEBUG;

			function-enumerator = <5>;

		};



		led-dbg6 {

			gpios = <&pca9698 6 GPIO_ACTIVE_HIGH>;

			color = <LED_COLOR_ID_GREEN>;

			function = LED_FUNCTION_DEBUG;

			function-enumerator = <6>;

		};



		led-dbg7 {

			gpios = <&pca9698 7 GPIO_ACTIVE_HIGH>;

			color = <LED_COLOR_ID_GREEN>;

			function = LED_FUNCTION_DEBUG;

			function-enumerator = <7>;

		};

	};

};
@@ -111,6 +171,10 @@ &eth_miic { 
	renesas,miic-switch-portin = <MIIC_GMAC2_PORT>;

};



&ext_rtc_clk {

	clock-frequency = <32768>;

};



&gmac2 {

	status = "okay";

	phy-mode = "gmii";

arch/arm/boot/dts/renesas/r9a06g032.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -73,8 +73,8 @@ rtc0: rtc@40006000 { 
				     <GIC_SPI 67 IRQ_TYPE_EDGE_RISING>,

				     <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>;

			interrupt-names = "alarm", "timer", "pps";

			clocks = <&sysctrl R9A06G032_HCLK_RTC>;

			clock-names = "hclk";

			clocks = <&sysctrl R9A06G032_HCLK_RTC>, <&ext_rtc_clk>;

			clock-names = "hclk", "xtal";

			power-domains = <&sysctrl>;

			status = "disabled";

		};

arch/arm64/boot/dts/renesas/Makefile

+3 −0
Original line number Diff line number Diff line
@@ -156,6 +156,9 @@ dtb-$(CONFIG_ARCH_R9A08G045) += r9a08g045s33-smarc-pmod1-type-3a.dtb 
dtb-$(CONFIG_ARCH_R9A09G011) += r9a09g011-v2mevk2.dtb



dtb-$(CONFIG_ARCH_R9A09G047) += r9a09g047e57-smarc.dtb

dtb-$(CONFIG_ARCH_R9A09G047) += r9a09g047e57-smarc-cru-csi-ov5645.dtbo

r9a09g047e57-smarc-cru-csi-ov5645-dtbs := r9a09g047e57-smarc.dtb r9a09g047e57-smarc-cru-csi-ov5645.dtbo

dtb-$(CONFIG_ARCH_R9A09G047) += r9a09g047e57-smarc-cru-csi-ov5645.dtb



dtb-$(CONFIG_ARCH_R9A09G056) += r9a09g056n48-rzv2n-evk.dtb

arch/arm64/boot/dts/renesas/condor-common.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -174,6 +174,7 @@ phy0: ethernet-phy@0 { 
&i2c0 {

	pinctrl-0 = <&i2c0_pins>;

	pinctrl-names = "default";

	bootph-all;



	status = "okay";

	clock-frequency = <400000>;
@@ -230,6 +231,7 @@ eeprom@50 { 
		compatible = "rohm,br24t01", "atmel,24c01";

		reg = <0x50>;

		pagesize = <8>;

		bootph-all;

	};

};

arch/arm64/boot/dts/renesas/draak.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -308,6 +308,7 @@ &hsusb { 
&i2c0 {

	pinctrl-0 = <&i2c0_pins>;

	pinctrl-names = "default";

	bootph-all;

	status = "okay";



	ak4613: codec@10 {
@@ -449,6 +450,7 @@ eeprom@50 { 
		compatible = "rohm,br24t01", "atmel,24c01";

		reg = <0x50>;

		pagesize = <8>;

		bootph-all;

	};

};