Commit 0e14eb0c authored by Hawking Zhang's avatar Hawking Zhang Committed by Alex Deucher
Browse files

drm/amdgpu: Query ras capablity from psp v2 



Instead of traditional atomfirmware interfaces for RAS
capability, host driver can query ras capability from
psp starting from psp v13_0_6.

v2: drop redundant local variable from get_ras_capability.

Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarTao Zhou <tao.zhou1@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent bcee21a4

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

+10 −0
Original line number Diff line number Diff line
@@ -2128,6 +2128,16 @@ int amdgpu_psp_wait_for_bootloader(struct amdgpu_device *adev) 
	return ret;

}



bool amdgpu_psp_get_ras_capability(struct psp_context *psp)

{

	if (psp->funcs &&

	    psp->funcs->get_ras_capability) {

		return psp->funcs->get_ras_capability(psp);

	} else {

		return false;

	}

}



static int psp_hw_start(struct psp_context *psp)

{

	struct amdgpu_device *adev = psp->adev;

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h

+2 −0
Original line number Diff line number Diff line
@@ -134,6 +134,7 @@ struct psp_funcs { 
	int (*update_spirom)(struct psp_context *psp, uint64_t fw_pri_mc_addr);

	int (*vbflash_stat)(struct psp_context *psp);

	int (*fatal_error_recovery_quirk)(struct psp_context *psp);

	bool (*get_ras_capability)(struct psp_context *psp);

};



struct ta_funcs {
@@ -537,4 +538,5 @@ int psp_spatial_partition(struct psp_context *psp, int mode); 
int is_psp_fw_valid(struct psp_bin_desc bin);



int amdgpu_psp_wait_for_bootloader(struct amdgpu_device *adev);

bool amdgpu_psp_get_ras_capability(struct psp_context *psp);

#endif

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

+26 −0
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ 
#include "amdgpu_ucode.h"

#include "soc15_common.h"

#include "psp_v13_0.h"

#include "amdgpu_ras.h"



#include "mp/mp_13_0_2_offset.h"

#include "mp/mp_13_0_2_sh_mask.h"
@@ -770,6 +771,30 @@ static int psp_v13_0_fatal_error_recovery_quirk(struct psp_context *psp) 
	return 0;

}



static bool psp_v13_0_get_ras_capability(struct psp_context *psp)

{

	struct amdgpu_device *adev = psp->adev;

	struct amdgpu_ras *con = amdgpu_ras_get_context(adev);

	u32 reg_data;



	/* query ras cap should be done from host side */

	if (amdgpu_sriov_vf(adev))

		return false;



	if (!con)

		return false;



	if ((amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6)) &&

	    (!(adev->flags & AMD_IS_APU))) {

		reg_data = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_127);

		adev->ras_hw_enabled = (reg_data & GENMASK_ULL(23, 0));

		con->poison_supported = ((reg_data & GENMASK_ULL(24, 24)) >> 24) ? true : false;

		return true;

	} else {

		return false;

	}

}



static const struct psp_funcs psp_v13_0_funcs = {

	.init_microcode = psp_v13_0_init_microcode,

	.wait_for_bootloader = psp_v13_0_wait_for_bootloader_steady_state,
@@ -792,6 +817,7 @@ static const struct psp_funcs psp_v13_0_funcs = { 
	.update_spirom = psp_v13_0_update_spirom,

	.vbflash_stat = psp_v13_0_vbflash_status,

	.fatal_error_recovery_quirk = psp_v13_0_fatal_error_recovery_quirk,

	.get_ras_capability = psp_v13_0_get_ras_capability,

};



void psp_v13_0_set_psp_funcs(struct psp_context *psp)